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Sensitivity of heavy-ion-induced single event burnout in SiC MOSFET
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作者 Hong Zhang Hong-Xia Guo +5 位作者 Feng-Qi Zhang Xiao-Yu Pan Yi-Tian Liu Zhao-Qiao Gu An-An Ju Xiao-Ping Ouyang 《Chinese Physics B》 SCIE EI CAS CSCD 2022年第1期652-657,共6页
The energy deposition and electrothermal behavior of SiC metal-oxide-semiconductor field-effect transistor(MOSFET)under heavy ion radiation are investigated based on Monte Carlo method and TCAD numerical simulation.Th... The energy deposition and electrothermal behavior of SiC metal-oxide-semiconductor field-effect transistor(MOSFET)under heavy ion radiation are investigated based on Monte Carlo method and TCAD numerical simulation.The Monte Carlo simulation results show that the density of heavy ion-induced energy deposition is the largest in the center of the heavy ion track.The time for energy deposition in SiC is on the order of picoseconds.The TCAD is used to simulate the single event burnout(SEB)sensitivity of SiC MOSFET at four representative incident positions and four incident depths.When heavy ions strike vertically from SiC MOSFET source electrode,the SiC MOSFET has the shortest SEB time and the lowest SEB voltage with respect to direct strike from the epitaxial layer,strike from the channel,and strike from the body diode region.High current and strong electric field simultaneously appear in the local area of SiC MOSFET,resulting in excessive power dissipation,further leading to excessive high lattice temperature.The gate-source junction area and the substrate-epitaxial layer junction area are both the regions where the SiC lattice temperature first reaches the SEB critical temperature.In the SEB simulation of SiC MOSFET at different incident depths,when the incident depth does not exceed the device's epitaxial layer,the heavy-ion-induced charge deposition is not enough to make lattice temperature reach the SEB critical temperature. 展开更多
关键词 SiC MOSFET Monte Carlo method TCAD single event burnout lattice temperature
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Simulation study on single event burnout in linear doping buffer layer engineered power VDMOSFET 被引量:3
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作者 贾云鹏 苏洪源 +2 位作者 金锐 胡冬青 吴郁 《Journal of Semiconductors》 EI CAS CSCD 2016年第2期90-93,共4页
The addition of a buffer layer can improve the device's secondary breakdown voltage, thus, improving the single event burnout (SEB) threshold voltage. In this paper, an N type linear doping buffer layer is proposed... The addition of a buffer layer can improve the device's secondary breakdown voltage, thus, improving the single event burnout (SEB) threshold voltage. In this paper, an N type linear doping buffer layer is proposed. According to quasi-stationary avalanche simulation and heavy ion beam simulation, the results show that an op- timized linear doping buffer layer is critical. As SEB is induced by heavy ions impacting, the electric field of an optimized linear doping buffer device is much lower than that with an optimized constant doping buffer layer at a given buffer layer thickness and the same biasing voltages. Secondary breakdown voltage and the parasitic bipolar turn-on current are much higher than those with the optimized constant doping buffer ~ayer. So the linear buffer layer is more advantageous to improving the device's SEB performance. 展开更多
关键词 single event burnout (SEB) quasi-static avalanche linear doping buffer layer heavy ion Au beam
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Equivalent properties of single event burnout induced by different sources 被引量:1
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作者 杨世宇 曹洲 +1 位作者 达道安 薛玉雄 《Chinese Physics C》 SCIE CAS CSCD 2009年第5期369-373,共5页
The experimental results of single event burnout induced by heavy ions and 252Cf fission fragments in power MOSFET devices have been investigated. It is concluded that the characteristics of single event burnout induc... The experimental results of single event burnout induced by heavy ions and 252Cf fission fragments in power MOSFET devices have been investigated. It is concluded that the characteristics of single event burnout induced by 252Cf fission fragments is consistent to that in heavy ions. The power MOSFET in the "turn-off" state is more susceptible to single event burnout than it is in the "turn-on" state. The thresholds of the drain-source voltage for single event burnout induced by 173 MeV bromine ions and ^252Cf fission fragments are close to each other, and the burnout cross section is sensitive to variation of the drain-source voltage above the threshold of single event burnout. In addition, the current waveforms of single event burnouts induced by different sources are similar. Different power MOSFET devices may have different probabilities for the occurrence of single event burnout. 展开更多
关键词 single event effect single event burnout power MOSFET radiation sources
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Experiment and simulation on degradation and burnout mechanisms of SiC MOSFET under heavy ion irradiation 被引量:2
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作者 张鸿 郭红霞 +9 位作者 雷志锋 彭超 张战刚 陈资文 孙常皓 何玉娟 张凤祁 潘霄宇 钟向丽 欧阳晓平 《Chinese Physics B》 SCIE EI CAS CSCD 2023年第2期525-534,共10页
Experiments and simulation studies on 283 MeV I ion induced single event effects of silicon carbide(SiC) metal–oxide–semiconductor field-effect transistors(MOSFETs) were carried out. When the cumulative irradiation ... Experiments and simulation studies on 283 MeV I ion induced single event effects of silicon carbide(SiC) metal–oxide–semiconductor field-effect transistors(MOSFETs) were carried out. When the cumulative irradiation fluence of the SiC MOSFET reached 5×10^(6)ion·cm^(-2), the drain–gate channel current increased under 200 V drain voltage, the drain–gate channel current and the drain–source channel current increased under 350 V drain voltage. The device occurred single event burnout under 800 V drain voltage, resulting in a complete loss of breakdown voltage. Combined with emission microscope, scanning electron microscope and focused ion beam analysis, the device with increased drain–gate channel current and drain–source channel current was found to have drain–gate channel current leakage point and local source metal melt, and the device with single event burnout was found to have local melting of its gate, source, epitaxial layer and substrate. Combining with Monte Carlo simulation and TCAD electrothermal simulation, it was found that the initial area of single event burnout might occur at the source–gate corner or the substrate–epitaxial interface, electric field and current density both affected the lattice temperature peak. The excessive lattice temperature during the irradiation process appeared at the local source contact, which led to the drain–source channel damage. And the excessive electric field appeared in the gate oxide layer, resulting in drain–gate channel damage. 展开更多
关键词 heavy ion silicon carbide metal–oxide–semiconductor field-effect transistors(SiC MOSFET) drain–gate channel drain–source channel single event burnout TCAD simulation
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SEGR-and SEB-hardened structure with DSPSOI in power MOSFETs 被引量:3
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作者 Zhaohuan Tang Xinghua Fu +4 位作者 Fashun Yang Kaizhou Tan Kui Ma Xue Wu Jiexing Lin 《Journal of Semiconductors》 EI CAS CSCD 2017年第12期68-72,共5页
Single event irradiation-hardened power MOSFET is the most important device for DC/DC converter in space environment application. Single event gate rupture (SEGR) and single event burnout (SEB), which will degrade... Single event irradiation-hardened power MOSFET is the most important device for DC/DC converter in space environment application. Single event gate rupture (SEGR) and single event burnout (SEB), which will degrade the running safety and reliability of spacecraft, are the two typical failure modes in power MOSFETs. In this paper, based on recombination mechanism of interface between oxide and silicon, a novel hardened power MOS- FETs structure for SEGR and SEB is proposed. The structure comprises double stagger partial silicon-on-insulator (DSPSOI) layers. Results show that the safety operation area (SOA) of a 130 V N-channel power MOSFET in single event irradiation environment is enhanced by up to 50% when the linear-energy-transfer value of heavy ion is a constant of 98 MeV-cm2/mg in the whole incident track, and the other parameters are almost maintained at the same value. Thus this novel structure can be widely used in designing single event irradiation-hardened power MOSFETs. 展开更多
关键词 power MOSFETs partial silicon-on-insulator single event gate rupture single event burnout
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