Design of BPS digital frontend for software defined radio receiver

In radio receivers,complete implementation of the software defined radio(SDR) concept is mainly limited by frontend.Based on bandpass sampling(BPS) theory,a flexible digital frontend(DFE) platform for SDR receiver is designed.In order to increase the processing speed,Gigabit Ethernet was applied in the platform at speed of 5×10~8 bit/s.By appropriate design of interpolant according to the position of input RF signals,multi-band receiving can be realized in the platform with suppression more than 35 d B without changing hardware.

Universal Band Pass Sampling Algorithm for Integration of Multiple Wireless Technologies Using Software Defined Radio Platform

Software Defined Radio (SDR) architecture allows us to integrate different mobile technologies using common hardware but with different software modules. To achieve this, we need to keep the signal in digital form for as much portion of the circuitry as possible, so that the implementation could be carried out by programmable digital processors. For this purpose, the incoming radio frequency (RF) signal is down converted to baseband spectrum using band pass sampling method. Research works carried out so far in this field have developed a few algorithms for band pass sampling. But, these algorithms are not much useful for most of the mobile communication systems and they use complex methodology for computing the sampling frequency values. In order to use the SDR platform to integrate all current wireless technologies, an efficient, cost effective and less complex algorithm that can be labelled as universal band pass sampling algorithm is developed in this paper for multiple mobile systems. This algorithm is based on a novel idea of inserting guard bands between the signals which reduces the design complexities of perfect ADC and sharp cut off filters. Using this algorithm, valid sampling frequency ranges and corresponding IF values are calculated for down converting RF signals. The algorithm is tested for six RF signals of different wireless technologies which are integrated and simultaneously down converted using SDR based front end receiver and thus the system multiplies the base station capacity by a factor of six. The simulation results are obtained and shown in this paper which proves that the algorithm developed works well for most of the wireless technologies.

A low power flexible PGA for software defined radio systems

This paper proposes a new low power structure to improve the trade-off between the bandwidth and the power consumption of a programmable gain amplifier（PGA）.The PGA consists of three-stage amplifiers, which includes a variable gain amplifier and DC offset cancellation circuits.The cutoff frequency of the DC offset cancellation circuits can be changed from 4 to 80 kHz.The chip was fabricated in 0.13μm CMOS technology. Measurement results showed that the gain of the PGA can be programmed from -5 to 60 dB.At the gain setting of 60 dB,the bandwidth can be tuned from 1 to 10 MHz,while the power consumption can be programmed from 850μA to 3.2 mA at a supply voltage of 1.2 V.Its in-band OIP3 result is at 14 dBm.

Digital Radio Broadcasting for Community Radios Using Pseudo-random Codes

This paper aims to present a digital radio broadcasting system that explores the advantages of pseudo-random codes. In this context, a transmitter and its dual receiver are able to reuse frequency spectrum bands without interfering on other existing communication systems. It is proposed a communication system that allows radio broadcasting with the following characteristics: lower transmission power, new communication channels and digital signal processing techinques to add positioning services in two dimensions.

Researching on quadrature conversion structures For an UWB demonstrative receiver

Some structures of digital quadrature AD conversion for soft-ware-defined radio （SDR） systems are studied. Their performances and affections on the SDR systems are also analyzed. Two generalized quadrature AD schemes are proposed. In one of them, the AD sampling speed can be reduced by 2 times; and in the other both the output data rate of every channel and AD sampling speed can be lowered by paralleling the digital quadrature filtering structure. These structures can be also easily implemented into modules, and the polyphase filters can be flexibly realized by VHDL language based one chip of FPGA. To assess the proposed schemes, their applications to a particular ultra wideband （UWB） demonstrative receiver system are introduced. Some experimental results are also given. It is shown that the generalized quadrature AD structures are reliable and feasible for its module design, and performances are improved obviously for its better performance to price ratio.

Enhancements of SDR-Based FPGA System for V2X-VLC Communications

This pilot study focuses on a real measurements and enhancements of a software defined radio-based system for vehicle-to everything visible light communication(SDR-V2X-VLC).The presented system is based on a novel adaptive optimization of the feed-forward software defined equalization(FFSDE)methods of the least mean squares(LMS),normalized LMS(NLMS)and QR decomposition-based recursive least squares(QR-RLS)algorithms.Individual parameters of adaptive equalizations are adjusted in real-time to reach the best possible results.Experiments were carried out on a conventional LED Octavia III taillight drafted directly from production line and universal software radio peripherals(USRP)from National Instruments.The transmitting/receiving elements used multistate quadrature amplitude modulation(M-QAM)implemented in LabVIEW programming environment.Experimental results were verified based on bit error ratio(BER),error vector magnitude(EVM)and modulation error ratio(MER).Experimental results of the pilot study unambiguously confirmed the effectiveness of the proposed solution(longer effective communication range,higher immunity to interference,deployment of higher state QAM modulation formats,higher transmission speeds etc.),as the adaptive equalization significantly improved BER,MER and EVM parameters.The best results were achieved using the QR-RLS algorithm.The results measured on deployed QR-RLS algorithm had significantly better Eb/N0(improved by approx.20 dB)and BER values(difference by up to two orders of magnitude).

NOVEL HIGH-SPEED FPGA-BASED FFT PROCESSOR

A novel architecture for computing the fast Fourier transform ( FFT ) on programmable devices is presented.To improve the system operation speed , a hybrid parallel FFT algorithm is used.Results indicate that the use of an 8×8parallel structure for realizing the 64-point FFT leads to a 8times higher processing speed compared with its counterparts employing other series of techniques.

Real-time ray-based channel generation and emulation for UAV communications

A real-time ray-based hardware emulator for Unmanned Aerial Vehicle(UAV) communication channels which suits for the Three-Dimensional(3D) dynamic scenarios and considers the movements of both terminals is developed in this paper. The time-variant channel parameters, i.e.,ray delay, ray gain, and ray Doppler frequency are precalculated in the host by using the Ray Tracing(RT) method. Meanwhile, RT simulation dramatically increases the number of valid rays. To address the problem of resource limitation and huge computational burden in the implementation,an efficient ray coefficients generation method based on iteration is proposed and implemented.With the advantages of low cost and high flexibility, a Software Defined Radio(SDR) hardware platform is used to emulate the ray-based UAV channels by utilizing the compact architecture including the Time-Division(TD) scheme and Tapped-Delay Line(TDL) for channel convolution.Finally, hardware measurement results demonstrate that the properties of emulated channel, i.e.,Power Delay Profile(PDP) and Doppler Power Spectrum Density(DPSD) consist with the simulated ones, which verifies the correctness of hardware implementation. The proposed channel emulator provides an efficient way for optimization, verification, and evaluation of UAV communication systems.

Detecting IEEE 802.11 Client Device Impersonation on a Wireless Access Point

The ability to effortlessly construct and broadcast false messages makes IEEE 802.11 wireless networks particularly vulnerable to attack.False frame generation allows rogue devices to impersonate an authorized user and issue commands that impact the user’s network connection or possibly the entire network’s security.Unfortunately,the current device impersonation detection methods are unsuitable for small devices or real-time applications.Our contribution is to demonstrate that a rule-based learning classifier using several random forest(RF)features from an IEEE 802.11 frame can determine the probability that an impersonating device has generated that frame in real time.Our main innovation is a processing pipeline,and the algorithm that implements concurrent one-class classifiers on a per device basis yet is lightweight enough to run directly on a wireless access point(WAP)and produce real-time outputs.