Single-chip multiprocessor (CMP) combined with the fault-loleranl(FT)techniques offers an ideal architecture to achieve high availability on the basis of sustaining highcomputing performance FT design of a single-chip...Single-chip multiprocessor (CMP) combined with the fault-loleranl(FT)techniques offers an ideal architecture to achieve high availability on the basis of sustaining highcomputing performance FT design of a single-chip multiprocessor is described, including thetechniques from hard-wart redundancy to software support and firmware strategy. The design aims atmasking the influences of errors and automatically correcting the system states.展开更多
Field Programmable Gate Array(FPGA) is an efficient reconfigurable integrated circuit platform and has become a core signal processing microchip device of digital systems over the last decade. With the rapid developme...Field Programmable Gate Array(FPGA) is an efficient reconfigurable integrated circuit platform and has become a core signal processing microchip device of digital systems over the last decade. With the rapid development of semiconductor technology, the performance and system integration of FPGA devices have been significantly progressed, and at the same time new challenges arise. The design of FPGA architecture is required to evolve to meet these challenges, while also taking advantage of ever increased microchip density. This survey reviews the recent development of advanced FPGA architectures, including improvement of the programming technologies, logic blocks, interconnects, and embedded resources. Moreover, some important emerging design issues of FPGA architectures, such as novel memory based FPGAs and 3D FPGAs, are also presented to provide an outlook for future FPGA development.展开更多
The growing complexity of System on Chip （SOC） requres a system level specicanon and design approach. High-level languages such as C＋＋/SystemC can play multiple roles in system design as target languages. There ar...The growing complexity of System on Chip （SOC） requres a system level specicanon and design approach. High-level languages such as C＋＋/SystemC can play multiple roles in system design as target languages. There are many practical problems in the application of object-oriented methods for this goal. Based on the analysis of traditional and system-level design methodology, a new object-oriented SOC design methodology with object-oriented design patterns is proposed, which emphasizes high-level design and verification. Aiming at the final goal of developing design patterns specific to SOC design, the reuse of design patterns in SOC systems and the capability of new SOC design patterns are discussed. With the illustration of some concrete examples of SOC design patterns, the application of object-oriented design methodology in the SOC design process is presented.展开更多
基金Supported by the National High Techology Devel opment 863 Program of China(2002AA1Z030) and China PostdoctoralScience Foundation(2003034151)
文摘Single-chip multiprocessor (CMP) combined with the fault-loleranl(FT)techniques offers an ideal architecture to achieve high availability on the basis of sustaining highcomputing performance FT design of a single-chip multiprocessor is described, including thetechniques from hard-wart redundancy to software support and firmware strategy. The design aims atmasking the influences of errors and automatically correcting the system states.
基金Supported by National Natural Science Foundation of China(No.61271149)National High Technology Research and Development Program of China(No.2012AA-012301)National Science and Technology Major Project of China(No.2013ZX03006004)
文摘Field Programmable Gate Array(FPGA) is an efficient reconfigurable integrated circuit platform and has become a core signal processing microchip device of digital systems over the last decade. With the rapid development of semiconductor technology, the performance and system integration of FPGA devices have been significantly progressed, and at the same time new challenges arise. The design of FPGA architecture is required to evolve to meet these challenges, while also taking advantage of ever increased microchip density. This survey reviews the recent development of advanced FPGA architectures, including improvement of the programming technologies, logic blocks, interconnects, and embedded resources. Moreover, some important emerging design issues of FPGA architectures, such as novel memory based FPGAs and 3D FPGAs, are also presented to provide an outlook for future FPGA development.
文摘The growing complexity of System on Chip （SOC） requres a system level specicanon and design approach. High-level languages such as C＋＋/SystemC can play multiple roles in system design as target languages. There are many practical problems in the application of object-oriented methods for this goal. Based on the analysis of traditional and system-level design methodology, a new object-oriented SOC design methodology with object-oriented design patterns is proposed, which emphasizes high-level design and verification. Aiming at the final goal of developing design patterns specific to SOC design, the reuse of design patterns in SOC systems and the capability of new SOC design patterns are discussed. With the illustration of some concrete examples of SOC design patterns, the application of object-oriented design methodology in the SOC design process is presented.
