Low capacitance and highly reliable blind through-silicon-vias(TSVs) with vacuum-assisted spin coating of polyimide dielectric liners

Low-k and high aspect ratio blind through-silicon-vias （TSVs） to be applied in ＂via-last/backside via＂ 3-D integration paradigm were fabricated with polyimide dielectric liners formed by vacuum-assisted spin coating technique. MIS trench capacitors with diameter of-6 μm and depth of-54 μm were successfully fabricated with polyimide insulator step coverage better than 30%. C-V characteristics and leakage current properties of the MIS trench capacitor were evaluated under thermal treat- ment. Experimental results show that, the minimum capacitance density is around 4.82 nF/cm2, and the leakage current density after 30 cycles of thermal chock tests becomes stable and it is around 30 nA/cm2 under bias voltage of 20 V. It also shows that, the polyimide dielectric liner is with an excellent capability in constraining copper ion diffusion and mobile charges even un- der test temperature as high as 125℃. Finite element analysis results show that TSVs with polyimide dielectric liner are with lower risks in SiO2 interlayer dielectric （ILD） fracture and interfacial delamination along dielectric-silicon interface, thus, higher thermo-mechanical reliability can be expected.

Through-silicon-via crosstalk model and optimization design for three-dimensional integrated circuits

Through-silicon-via （TSV） to TSV crosstalk noise is one of the key factors affecting the signal integrity of three- dimensional integrated circuits （3D ICs）. Based on the frequency dependent equivalent electrical parameters for the TSV channel, an analytical crosstalk noise model is established to capture the TSV induced crosstalk noise. The impact of various design parameters including insulation dielectric, via pitch, via height, silicon conductivity, and terminal impedance on the crosstalk noise is analyzed with the proposed model. Two approaches are proposed to alleviate the TSV noise, namely, driver sizing and via shielding, and the SPICE results show 241 rnV and 379 mV reductions in the peak noise voltage, respectively.

Investigation on mechanism of polymer filling in high-aspect-ratio trenches for through-silicon-via(TSV) application

Vacuum-assisted spin-coating is an effective polymer filling technology for sidewall insulating of through-silicon-via(TSV).This paper investigated the flow mechanism of the vacuum-assisted polymer filling process based on experiments and numerical simulation,and studied the effect of vacuum pressure,viscosity of polymer and aspect-ratio of trench on the filling performance.A 2D axisymmetric model,consisting of polymer partially filled into the trench and void at the bottom of trench,was developed for the computational fluid dynamics(CFD)simulation.The simulation results indicate that the vacuum-assisted polymer filling process goes through four stages,including bubble formation,bubble burst,air elimination and polymer re-filling.Moreover,the simulation results suggest that the pressure significantly affects the bubble formation and the polymer re-filling procedure,and the polymer viscosity and the trench aspect-ratio influence the duration of air elimination.

Ultra-high-aspect-ratio structures through silicon using infrared laser pulses focused with axicon-lens doublets

We describe how a direct combination of an axicon and a lens can represent a simple and efficient beam-shaping solution for laser material processing applications.We produce high-angle pseudo-Bessel micro-beams at 1550 nm,which would be difficult to produce by other methods.Combined with appropriate stretching of femtosecond pulses,we access optimized conditions inside semiconductors allowing us to develop high-aspect-ratio refractive-index writing methods.Using ultrafast microscopy techniques,we characterize the delivered local intensities and the triggered ionization dynamics inside silicon with 200-fs and 50-ps pulses.While similar plasma densities are produced in both cases,we show that repeated picosecond irradiation induces permanent modifications spontaneously growing shot-after-shot in the direction of the laser beam from front-surface damage to the back side of irradiated silicon wafers.The conditions for direct microexplosion and microchannel drilling similar to those today demonstrated for dielectrics still remain inaccessible.Nonetheless,this work evidences higher energy densities than those previously achieved in semiconductors and a novel percussion writing modality to create structures in silicon with aspect ratios exceeding~700 without any motion of the beam.The estimated transient change of conductivity and measured ionization fronts at near luminal speed along the observed microplasma channels support the vision of vertical electrical connections optically controllable at GHz repetition rates.The permanent silicon modifications obtained by percussion writing are light-guiding structures according to a measured positive refractive index change exceeding 10-2.These findings open the door to unique monolithic solutions for electrical and optical through-silicon-vias which are key elements for vertical interconnections in 3D chip stacks.

Novel through-silicon vias for enhanced signal integrity in 3D integrated systems

In this paper, a new type of through-silicon via（TSV） for via-first process namely bare TSV, is proposed and analyzed with the aim of mitigating noise coupling problems in 3D integrated systems for advanced technology nodes. The bare TSVs have no insulation layers, and are divided into two types： bare signal TSVs and bare ground TSVs. First, by solving Poisson＇s equation for cylindrical P–N junctions, the bare signal TSVs are shown to be equivalent to conventional signal TSVs according to the simulation results. Then the bare ground TSV is proved to have improved noise-absorption capability when compared with a conventional ground TSV. Also, the proposed bare TSVs offer more advantages to circuits than other noise isolation methods, because the original circuit design,routing and placement can be retained after the application of the bare TSVs.

Steady state electrical–thermal coupling analysis of TSV

This paper presents a blended analytical electrical–thermal model for steady state thermal analysis of through-silicon-via（TSV） in three-dimensional（3 D） integrated circuits. The proposed analytical model is validated by the commercial FEM tool—COMSOL. The comparison between the results of the proposed analytical formulas and COMSOL shows that the proposed formulas have very high accuracy with a maximum error of 0.1%.Based on the analytical model, the temperature performance of TSV is studied. Design guide lines of TSV are also given as：（1） the radius of the TSV increases, the resistance decreases and the temperature can be increased;（2） the thicker the dielectric layer, the higher the temperature;（3） compared with carbon nanotube, the Cu enlarges the temperature by 34 K, and the W case enlarges the temperature by 41 K.