Time-to-Digital Converter (TDC) is a key block used as the phase/frequency detector in an All-Digital Phase-Locked Loop (ADPLL). Usually, it occupies a large proportion of ADPLL's total power consumption up to abo...Time-to-Digital Converter (TDC) is a key block used as the phase/frequency detector in an All-Digital Phase-Locked Loop (ADPLL). Usually, it occupies a large proportion of ADPLL's total power consumption up to about 30% to 40%. In this paper, the detailed power consumption of different components in the TDC is analyzed. A Power Management Block (PMB) is presented for the TDC to reduce its power consumption. A 24-bits TDC core with the proposed PMB is implemented in HJTC 0.18 μm CMOS technology. Simulation results show that up to 84% power reduction is achieved using our proposed technique.展开更多
A kind of architecture of Time-to-Digital Converter(TDC) for Ultra-WideBand(UWB) application is presented. The proposed TDC is based on pulse shrinking, and implemented in a Field Programmable Gate Array(FPGA) device....A kind of architecture of Time-to-Digital Converter(TDC) for Ultra-WideBand(UWB) application is presented. The proposed TDC is based on pulse shrinking, and implemented in a Field Programmable Gate Array(FPGA) device. The pulse shrinking is realized in a loop containing two Programmable Delay Lines(PDLs) or a two-channel PDL. One line(channel) delays the rising edge and the other line(channel) delays the falling edge of a circulating pulse. Delay resolution of PDL is converted into a digital output code under known conditions of pulse width. This delay resolution measurement mechanism is different from the conventional time interval measurement mechanism based on pulse shrinking of conversion of unknown pulse width into a digital output code. This mechanism automatically avoids the influence of unwanted pulse shrinking by any circuit element apart from the lines. The achieved relative errors for four PDLs are within 0.80%–1.60%.展开更多
A two-step high-precision Time-to-Digital Converter(TDC),integrated with a Single-Photon Avalanche Diode(SPAD),used for Time-Of-Flight(TOF)application,has been developed and tested.Time interval measurement is perform...A two-step high-precision Time-to-Digital Converter(TDC),integrated with a Single-Photon Avalanche Diode(SPAD),used for Time-Of-Flight(TOF)application,has been developed and tested.Time interval measurement is performed by the coarse counter and fine interpolator,which are utilized to measure the total periods and the residue time of the reference clock,respectively.Following a detail analysis of time precision and clock jitter in the two-step structure,the prototype TDC fabricated in GSMC 1P6M 0.18μm CMOS Image Sensor(CIS)technology exhibits a Single-Shot Precision(SSP)of 11.415 ps and a dynamic range of 216.7 ns.In addition,a pixel of the chip occupies 100μm×100μm,and the measured Integral Nonlinearity(INL)and Differential Nonlinearity(DNL)are better than±0.88 LSB and±0.67 LSB,respectively.Meanwhile,the overall power consumption of the chip is 35 mW at 1.8 V power supply.Combined with these characteristics,the designed chip is suitable for TOF-based ranging applications.展开更多
This paperpresents a single-stage Vernier Time-to-Digital Converter (VTDC) that utilizes the dynamic-logic phase detector. The zero dead-zone characteristic of this phase detector allows for the single-stage VTDC to d...This paperpresents a single-stage Vernier Time-to-Digital Converter (VTDC) that utilizes the dynamic-logic phase detector. The zero dead-zone characteristic of this phase detector allows for the single-stage VTDC to deliver sub-gate delay time resolution. The single-stage VTDC has been designed in 0.13μm CMOS technology. The simulation results demonstrate a linear input-output characteristic for input dynamic range from 0 to 1.6ns with a time resolution of 25ps.展开更多
In this paper, the design of a coarse-fine interpolation Time-to-Digital Converter (TDC) is implemented in an ALTERA’s Cyclone FPGA. The carry-select chain performs as the tapped delay line. The Logic Array Block (LA...In this paper, the design of a coarse-fine interpolation Time-to-Digital Converter (TDC) is implemented in an ALTERA’s Cyclone FPGA. The carry-select chain performs as the tapped delay line. The Logic Array Block (LAB) having a propagation delay of 165 ps in the chain is synthesized as delay cell. Coarse counters triggered by the global clock count the more significant bits of the time data. This clock is also fed through the delay line, and LABs create the copies. The replicas are latched by the tested event signal, and the less significant bits are encoded from the latched binary bits. Single-shot resolution of the TDC can be 60 ps. The worst Differential Nonlinearity (DNL) is about 0.2 Least Significant Bit (LSB, 165 ps in this TDC module), and the Integral Nonlinearity (INL) is 0.6 LSB. In comparison with other architectures using the synchronous global clock to sample the taps, this architecture consumed less electric power and logic cells, and is more stable.展开更多
A gated ring oscillator(GRO) based time-to-digital converter(TDC) is presented.To enhance the resolution of the TDC,a multi-path structure for the GRO is used to achieve a higher oscillation frequency and an input sta...A gated ring oscillator(GRO) based time-to-digital converter(TDC) is presented.To enhance the resolution of the TDC,a multi-path structure for the GRO is used to achieve a higher oscillation frequency and an input stage is also presented to equivalently amplify the input time difference with a gain of 2.The GRO based TDC circuit is fabricated in TSMC 65 nm CMOS technology and the core area is about 0.02 mm^2.According to the measurement results,the effective resolution of this circuit is better than 4.22 ps under a 50 MHz clock frequency. With a 1 ns input range,the maximum clock frequency of this circuit is larger than 200 MHz.Under a 1 V power supply,with a 200-800 ps input time difference,the measured power consumption is 1.24 to 1.72 mW at 50 MHz clock frequency and 1.73 to 2.20 mW at 200 MHz clock frequency.展开更多
A high resolution and fast conversion rate time-to-digital converter (TDC) design based on time amplifier (TA) is proposed. The pulse-train TA employs a two-step scheme. The input time interval is first amplified ...A high resolution and fast conversion rate time-to-digital converter (TDC) design based on time amplifier (TA) is proposed. The pulse-train TA employs a two-step scheme. The input time interval is first amplified by a N-times TA and the effective time is extracted in pulse-train using a time-register. Then the resulted interval is further amplified by the other pulse-train amplifier to obtain the final result. The two-step TA can thus achieve large gain that is critical for high resolution TDC. Simulation results in 1.2 V, 65 nm technology showed that for a 10 bit TDC, a resolution of 0. 8 ps and a conversion rate of 150 MS/s are achieved while consuming 2. 1 mW power consumption.展开更多
Switched-capacitor(SC)DC-DC converter[1]is an impor-tant alternative to inductive DC-DC converter,in terms of removing the bulky power inductor.Hence,it is widely used in low-profile,low-power applications,such as the...Switched-capacitor(SC)DC-DC converter[1]is an impor-tant alternative to inductive DC-DC converter,in terms of removing the bulky power inductor.Hence,it is widely used in low-profile,low-power applications,such as the internet of things(IoT)sensor nodes and energy harvesting[2].Mean-while,considering that capacitor has a much higher energy density than inductor,high-power applications.展开更多
Code converters are essential in digital nano communication;therefore,a low-complexity optimal QCA layout for a BCD to Excess-3 code converter has been proposed in this paper.A QCA clockphase-based design technique wa...Code converters are essential in digital nano communication;therefore,a low-complexity optimal QCA layout for a BCD to Excess-3 code converter has been proposed in this paper.A QCA clockphase-based design technique was adopted to investigate integration with other complicated circuits.Using a unique XOR gate,the recommended circuit’s cell complexity has been decreased.The findings produced using the QCADesigner-2.0.3,a reliable simulation tool,prove the effectiveness of the current structure over earlier designs by considering the number of cells deployed,the area occupied,and the latency as design metrics.In addition,the popular tool QCAPro was used to estimate the energy dissipation of the proposed design.The proposed technique reduces the occupied space by∼40%,improves cell complexity by∼20%,and reduces energy dissipation by∼1.8 times(atγ=1.5EK)compared to the current scalable designs.This paper also studied the suggested structure’s energy dissipation and compared it to existing works for a better performance evaluation.展开更多
Optical mode converters are essential for enhancing the capacity of optical communication systems. However, fabrication errors restrict the further improvement of conventional mode converters. To address this challeng...Optical mode converters are essential for enhancing the capacity of optical communication systems. However, fabrication errors restrict the further improvement of conventional mode converters. To address this challenge, we have designed an on-chip TE0–TE1mode converter based on topologically protected waveguide arrays. The simulation results demonstrate that the converter exhibits a mode coupling efficiency of 93.5% near 1550 nm and can tolerate a relative fabrication error of 30%. Our design approach can be extended to enhance the robustness for other integrated photonic devices, beneficial for future development of optical network systems.展开更多
In recent years,switched inductor(SL)technology,switched capacitor(SC)technology,and switched inductor-capacitor(SL-SC)technology have been widely applied to optimize and improve DC-DC boost converters,which can effec...In recent years,switched inductor(SL)technology,switched capacitor(SC)technology,and switched inductor-capacitor(SL-SC)technology have been widely applied to optimize and improve DC-DC boost converters,which can effectively enhance voltage gain and reduce device stress.To address the issue of low output voltage in current renewable energy power generation systems,this study proposes a novel non-isolated cubic high-gain DC-DC converter based on the traditional quadratic DC-DC boost converter by incorporating a SC and a SL-SC unit.Firstly,the proposed converter’s details are elaborated,including its topology structure,operating mode,voltage gain,device stress,and power loss.Subsequently,a comparative analysis is conducted on the voltage gain and device stress between the proposed converter and other high-gain converters.Then,a closed-loop simulation system is constructed to obtain simulation waveforms of various devices and explore the dynamic performance.Finally,an experimental prototype is built,experimental waveforms are obtained,and the experimental dynamic performance and conversion efficiency are analyzed.The theoretical analysis’s correctness is verified through simulation and experimental results.The proposed converter has advantages such as high voltage gain,low device stress,high conversion efficiency,simple control,and wide input voltage range,achieving a good balance between voltage gain,device stress,and power loss.The proposed converter is well-suited for renewable energy systems and holds theoretical significance and practical value in renewable energy applications.It provides an effective solution to the issue of low output voltage in renewable energy power generation systems.展开更多
In the DC microgrid,the lack of inertia and damping in power electronic converters results in poor stability of DC bus voltage and low inertia of the DC microgrid during fluctuations in load and photovoltaic power.To ...In the DC microgrid,the lack of inertia and damping in power electronic converters results in poor stability of DC bus voltage and low inertia of the DC microgrid during fluctuations in load and photovoltaic power.To address this issue,the application of a virtual synchronous generator(VSG)in grid-connected inverters control is referenced and proposes a control strategy called the analogous virtual synchronous generator(AVSG)control strategy for the interface DC/DC converter of the battery in the microgrid.Besides,a flexible parameter adaptive control method is introduced to further enhance the inertial behavior of the AVSG control.Firstly,a theoretical analysis is conducted on the various components of the DC microgrid,the structure of analogous virtual synchronous generator,and the control structure’s main parameters related to the DC microgrid’s inertial behavior.Secondly,the voltage change rate tracking coefficient is introduced to adjust the change of the virtual capacitance and damping coefficient flexibility,which further strengthens the inertia trend of the DC microgrid.Additionally,a small-signal modeling approach is used to analyze the approximate range of the AVSG’s main parameters ensuring system stability.Finally,conduct a simulation analysis by building the model of the DC microgrid system with photovoltaic(PV)and battery energy storage(BES)in MATLAB/Simulink.Simulation results from different scenarios have verified that the AVSG control introduces fixed inertia and damping into the droop control of the battery,resulting in a certain level of inertia enhancement.Furthermore,the additional adaptive control strategy built upon the AVSG control provides better and flexible inertial support for the DC microgrid,further enhances the stability of the DC bus voltage,and has a more positive impact on the battery performance.展开更多
With the increasing awareness of environmental protection, people’s concern of pollution issues arising. Vehicles, as the most important means of transportation, its exhaust emission has received considerable attenti...With the increasing awareness of environmental protection, people’s concern of pollution issues arising. Vehicles, as the most important means of transportation, its exhaust emission has received considerable attention. The catalytic converter is able to purify harmful substances in exhaust gas. The absolute content of precious metals in the catalytic converter dominates the exhaust gas purification effect. Accurate detection of precious metal content is of great significance for controlling the cost of catalysts, ensuring catalytic performance and recovering precious metals from spent catalysts. We herein summarized several instruments for precious metals content exploration, such as X-ray fluorescence spectrometer (XRF), atomic absorption spectrometer (AAS), inductively coupled plasma emission spectrometer (ICP) and spectrophotometer. In this thesis, the feasibility of using various devices for characterizing precious metal content in catalytic converters is analyzed and their strengths or weaknesses are elaborated.展开更多
In the modern wireless communication system,the manipulation for polarization of electromagnetic wave plays a important role in improving the capacity and reliability of communication.In this paper,a multifunctional p...In the modern wireless communication system,the manipulation for polarization of electromagnetic wave plays a important role in improving the capacity and reliability of communication.In this paper,a multifunctional polarization converter(MFPC)based on the multilayer reconfigurable metasurface is proposed,which can assist the source antenna to transmit and receive multiple polarization signals.The MFPC consists of a grating which can filter out the undesired polarization and four layers of metasurfaces incorporated with PIN diodes.The functions of the MFPC include LTC and LTL polarization conversions,co-polarization transmission and reflection for arbitrary polarization.By changing the states of PIN diodes,the functions of MFPC can be dynamically switched.Loaded on the aperture of source antenna,the proposed MFPC can serve as a transmissive array with multiple polarization channels,and can also provide EM protection for source antenna by reflecting the incoming interference waves.Cascading of the metasurfaces produces Fabry-Perot resonance in the MFPC,and it contributes to the realization of LTC and LTL polarization conversions.To verify the performance of the proposed MFPC,the prototype is fabricated and tested.The measured results show that the fractional bandwidths of four functions are all higher than 31.9% with transmission or reflection coefficients higher than-2 d B.The frequency band of each function is mainly concentrated in S-band.The measured data are in agreement with the simulated results.展开更多
We demonstrate superb large-area verticalβ-Ga_(2)O_(3)SBDs with a Schottky contact area of 1×1 mm^(2)and obtain a high-efficiency DC-DC converter based on the device.Theβ-Ga_(2)O_(3)SBD can obtain a forward cur...We demonstrate superb large-area verticalβ-Ga_(2)O_(3)SBDs with a Schottky contact area of 1×1 mm^(2)and obtain a high-efficiency DC-DC converter based on the device.Theβ-Ga_(2)O_(3)SBD can obtain a forward current of 8 A with a forward volt-age of 5 V,and has a reverse breakdown voltage of 612 V.The forward turn-on voltage(VF)and the on-resistance(Ron)are 1.17 V and 0.46Ω,respectively.The conversion efficiency of theβ-Ga_(2)O_(3)SBD-based DC-DC converter is 95.81%.This work indicates the great potential of Ga_(2)O_(3)SBDs and relevant circuits in power electronic applications.展开更多
This work focuses on the fuzzy controller for the proposed three-phase interleaved Step-up converter(ISC).The fuzzy controller for the proposed ISC converters for electric vehicles has been discussed in detail.The pro...This work focuses on the fuzzy controller for the proposed three-phase interleaved Step-up converter(ISC).The fuzzy controller for the proposed ISC converters for electric vehicles has been discussed in detail.The proposed ISC direct current(DC-DC)converter could also be used in automobiles,satellites,industries,and propulsion.To enhance voltage gain,the proposed ISC Converter combines boost converter and interleaved converter(IC).This design also reduces the number of switches.As a result,ISC converter switching losses are reduced.The proposed ISC Converter topology can produce a 143 V output voltage and 1 kW of power.Due to the high voltage gain of this converter design,it is suitable for medium and high-power systems.The proposed ISC Converter topology is simulated in MATLAB/Simulink.The simulated output displays a high output voltage.But the output voltage contains maximum ripples.Fuzzy proposes an ISC Converter which makes closed loop responsiveness and reduces the output voltage ripple.The proposed ISC converter has the lowest ripple output voltage,which is less than 2%,because the duty cycle is regulated using the fuzzy logic controller.It offers high voltage gain,minimal ripple,and low switching loss.The performance of the proposed converter is compared to that of the fuzzy and Pro-portional Integral(PI)controllers implemented in MATLAB.展开更多
Terahertz wave is between microwave and infrared bands in the electromagnetic spectrum with the frequency range from 0.1 THz to 10 THz. Controlling and processing of the polarization state in terahertz wave are the fo...Terahertz wave is between microwave and infrared bands in the electromagnetic spectrum with the frequency range from 0.1 THz to 10 THz. Controlling and processing of the polarization state in terahertz wave are the focus due to its great influence on the characteristics. In this paper, a transmissive metasurface terahertz polarization converter is designed in 3D structure with an upper surface of ruler-like rectangular, an intermediate dielectric layer and a lower surface of metal grid wires. Numerical simulations of the converter show that the polarization conversion ratio(PCR) is above 99.9% at 0.288 THz–1.6 THz, the polarization rotation angle(PRA) is close to 90° at 0.06 THz–1.4 THz, and the ellipticity angle(EA) is close to 0° at 0.531 THz–1.49 THz. The origin of the efficient polarization conversion is explained by analyzing the electric field intensity, magnetic field intensity, surface current, electric field energy density, and magnetic field energy density distributions of the converter at 1.19 THz and 0.87 THz, which are consistent with the energy transmittance and transmittance coefficient. In addition, the effects of different thickness and material of intermediate layer, thickness of upper surface material, polarized wave incidence angle, and metasurface materials on the performance of the polarization converter are discussed, and how they affect the conversion performance of the polarization converter are also explained.Our results provide a strong theoretical basis and technical support to develop high performance transmission-type terahertz polarization converters, and play an important role to promote the development of terahertz science and technology.展开更多
Currently, there are significant investments in the study of distributed generation, including solar energy by the photovoltaic conversion method. Basically, a cell directly converts solar energy to electricity. For t...Currently, there are significant investments in the study of distributed generation, including solar energy by the photovoltaic conversion method. Basically, a cell directly converts solar energy to electricity. For this, static converters are required. However, relevant issues arise in this process: point of maximum efficiency of module generation, strategy of control of the flow of energy to the network. The aim of this work is to monitor the main variables of a photovoltaic system, specifically the voltage and current module and their derivates. The goal is to implement the maximum power tracking technique using Fuzzy logic. In addition, the energy provided by the cell will be employed in an inverter stage that can operate as an active filter, voltage regulator, or generator of reactive and active power. The feasibility of using Fuzzy logic will also be studied. The first stage of this work involves parameterization and simulation of photovoltaic modules. The initial study examines the compatibility of a commercial module and its catalog data with the results of simulation. The simulated I-V characteristics show almost identical results to the catalog data. In sequence, a boost or lift DC-DC converter is employed to emulate variable load for maximum power transfer.展开更多
A numerical simulation method based on CFD has been established to simulate the fully coupled motion for an atten-uator-type wave energy converter(WEC).Based on this method,a detailed parametric analysis has been cond...A numerical simulation method based on CFD has been established to simulate the fully coupled motion for an atten-uator-type wave energy converter(WEC).Based on this method,a detailed parametric analysis has been conducted to investigate the design of the rafts.The effects of different parameters(wave parameters,structural parameters and PTO parameters)on the hydrodynamic characteristics of the attenuator-type WEC were studied in detail.The results show that in terms of wave parameters,there is an optimal wave period,which makes the relative pitching angle amplitude of the WEC reach the maximum,and the increase of wave height is conducive to the relative pitching angle amplitude of wave energy.Under different wave conditions,the relative pitch angle of the parallelogram raft device is the maximum.In terms of structural parameters,the parallelogram attenuator-type device has the optimal values in different relative directions,different distances and different apex angle,which makes the relative motion amplitude of the device reach the maximum,and the spacing and the apex angle have influence on the motion frequency of the device,while the relative direction has almost no influence on it.In terms of PTO parameters,there is an optimal damping coefficient,which makes the power generation efficiency of the WEC reach the maximum.The research results provide a valuable reference for future research and design of the attenuator-type WEC.展开更多
In this paper,an optimized Genetic Algorithm(GA)based internal model controller-proportional integral derivative(IMC-PID)controller has been designed for the control variable to output variable transfer function of dc...In this paper,an optimized Genetic Algorithm(GA)based internal model controller-proportional integral derivative(IMC-PID)controller has been designed for the control variable to output variable transfer function of dc-dc boost converter to mitigate the effect of non-minimum phase(NMP)behavior due to the presence of a right-half plane zero(RHPZ).This RHPZ limits the dynamic performance of the converter and leads to internal instability.The IMC PID is a streamlined counterpart of the standard feedback controller and easily achieves optimal set point and load change performance with a single filter tuning parameterλ.Also,this paper addresses the influences of the model-based controller with model plant mismatch on the closed-loop control.The conventional IMC PID design is realized as an optimization problem with a resilient controller being determined through a genetic algorithm.Computed results suggested that GA–IMC PID coheres to the optimum designs with a fast convergence rate and outperforms conventional IMC PID controllers.展开更多
基金Supported by the Tsinghua National Laboratory for Information Science and Technology(TNList)Cross-Discipline Foundationthe National Science and Technology Major Project(No.2010ZX03006-003-01)
文摘Time-to-Digital Converter (TDC) is a key block used as the phase/frequency detector in an All-Digital Phase-Locked Loop (ADPLL). Usually, it occupies a large proportion of ADPLL's total power consumption up to about 30% to 40%. In this paper, the detailed power consumption of different components in the TDC is analyzed. A Power Management Block (PMB) is presented for the TDC to reduce its power consumption. A 24-bits TDC core with the proposed PMB is implemented in HJTC 0.18 μm CMOS technology. Simulation results show that up to 84% power reduction is achieved using our proposed technique.
基金Supported by the National High Technology Research and Development Program(No.2012AA121901)
文摘A kind of architecture of Time-to-Digital Converter(TDC) for Ultra-WideBand(UWB) application is presented. The proposed TDC is based on pulse shrinking, and implemented in a Field Programmable Gate Array(FPGA) device. The pulse shrinking is realized in a loop containing two Programmable Delay Lines(PDLs) or a two-channel PDL. One line(channel) delays the rising edge and the other line(channel) delays the falling edge of a circulating pulse. Delay resolution of PDL is converted into a digital output code under known conditions of pulse width. This delay resolution measurement mechanism is different from the conventional time interval measurement mechanism based on pulse shrinking of conversion of unknown pulse width into a digital output code. This mechanism automatically avoids the influence of unwanted pulse shrinking by any circuit element apart from the lines. The achieved relative errors for four PDLs are within 0.80%–1.60%.
基金National Natural Science Foundation of China(61774129,61827812,61704145)Hunan Science and Technology Department Huxiang High-level Talent Gathering Project(2019RS1037)Changsha Science and Technology Plan Key Projects(kq1801035)。
文摘A two-step high-precision Time-to-Digital Converter(TDC),integrated with a Single-Photon Avalanche Diode(SPAD),used for Time-Of-Flight(TOF)application,has been developed and tested.Time interval measurement is performed by the coarse counter and fine interpolator,which are utilized to measure the total periods and the residue time of the reference clock,respectively.Following a detail analysis of time precision and clock jitter in the two-step structure,the prototype TDC fabricated in GSMC 1P6M 0.18μm CMOS Image Sensor(CIS)technology exhibits a Single-Shot Precision(SSP)of 11.415 ps and a dynamic range of 216.7 ns.In addition,a pixel of the chip occupies 100μm×100μm,and the measured Integral Nonlinearity(INL)and Differential Nonlinearity(DNL)are better than±0.88 LSB and±0.67 LSB,respectively.Meanwhile,the overall power consumption of the chip is 35 mW at 1.8 V power supply.Combined with these characteristics,the designed chip is suitable for TOF-based ranging applications.
文摘This paperpresents a single-stage Vernier Time-to-Digital Converter (VTDC) that utilizes the dynamic-logic phase detector. The zero dead-zone characteristic of this phase detector allows for the single-stage VTDC to deliver sub-gate delay time resolution. The single-stage VTDC has been designed in 0.13μm CMOS technology. The simulation results demonstrate a linear input-output characteristic for input dynamic range from 0 to 1.6ns with a time resolution of 25ps.
基金Supported by National Natural Science Foundation of China (No. 10405023)Knowledge Innovation Program of The Chinese Academy of Sciences (KJCX2-YW-N27)
文摘In this paper, the design of a coarse-fine interpolation Time-to-Digital Converter (TDC) is implemented in an ALTERA’s Cyclone FPGA. The carry-select chain performs as the tapped delay line. The Logic Array Block (LAB) having a propagation delay of 165 ps in the chain is synthesized as delay cell. Coarse counters triggered by the global clock count the more significant bits of the time data. This clock is also fed through the delay line, and LABs create the copies. The replicas are latched by the tested event signal, and the less significant bits are encoded from the latched binary bits. Single-shot resolution of the TDC can be 60 ps. The worst Differential Nonlinearity (DNL) is about 0.2 Least Significant Bit (LSB, 165 ps in this TDC module), and the Integral Nonlinearity (INL) is 0.6 LSB. In comparison with other architectures using the synchronous global clock to sample the taps, this architecture consumed less electric power and logic cells, and is more stable.
基金supported by the Important National Science and Technology Specific Projects of China(No.2009ZX01031-003-002)
文摘A gated ring oscillator(GRO) based time-to-digital converter(TDC) is presented.To enhance the resolution of the TDC,a multi-path structure for the GRO is used to achieve a higher oscillation frequency and an input stage is also presented to equivalently amplify the input time difference with a gain of 2.The GRO based TDC circuit is fabricated in TSMC 65 nm CMOS technology and the core area is about 0.02 mm^2.According to the measurement results,the effective resolution of this circuit is better than 4.22 ps under a 50 MHz clock frequency. With a 1 ns input range,the maximum clock frequency of this circuit is larger than 200 MHz.Under a 1 V power supply,with a 200-800 ps input time difference,the measured power consumption is 1.24 to 1.72 mW at 50 MHz clock frequency and 1.73 to 2.20 mW at 200 MHz clock frequency.
基金supported by the National Natural Science Foundation of China ( 61774005)
文摘A high resolution and fast conversion rate time-to-digital converter (TDC) design based on time amplifier (TA) is proposed. The pulse-train TA employs a two-step scheme. The input time interval is first amplified by a N-times TA and the effective time is extracted in pulse-train using a time-register. Then the resulted interval is further amplified by the other pulse-train amplifier to obtain the final result. The two-step TA can thus achieve large gain that is critical for high resolution TDC. Simulation results in 1.2 V, 65 nm technology showed that for a 10 bit TDC, a resolution of 0. 8 ps and a conversion rate of 150 MS/s are achieved while consuming 2. 1 mW power consumption.
基金This work is supported by the Macao Science and Technology Development Fund(FDCT)under Grant 0041/2022/A1by the Research Committee of University of Macao under Grant MYRG2022-00004-IME.
文摘Switched-capacitor(SC)DC-DC converter[1]is an impor-tant alternative to inductive DC-DC converter,in terms of removing the bulky power inductor.Hence,it is widely used in low-profile,low-power applications,such as the internet of things(IoT)sensor nodes and energy harvesting[2].Mean-while,considering that capacitor has a much higher energy density than inductor,high-power applications.
文摘Code converters are essential in digital nano communication;therefore,a low-complexity optimal QCA layout for a BCD to Excess-3 code converter has been proposed in this paper.A QCA clockphase-based design technique was adopted to investigate integration with other complicated circuits.Using a unique XOR gate,the recommended circuit’s cell complexity has been decreased.The findings produced using the QCADesigner-2.0.3,a reliable simulation tool,prove the effectiveness of the current structure over earlier designs by considering the number of cells deployed,the area occupied,and the latency as design metrics.In addition,the popular tool QCAPro was used to estimate the energy dissipation of the proposed design.The proposed technique reduces the occupied space by∼40%,improves cell complexity by∼20%,and reduces energy dissipation by∼1.8 times(atγ=1.5EK)compared to the current scalable designs.This paper also studied the suggested structure’s energy dissipation and compared it to existing works for a better performance evaluation.
基金Project supported by the National Undergraduate Training Projects for Innovation and Entrepreneurship (Grant No. 5003182007)the National Natural Science Foundation of China (Grant No. 12074137)+1 种基金the National Key Research and Development Project of China (Grant No. 2021YFB2801903)the Natural Science Foundation from the Science,Technology,and Innovation Commission of Shenzhen Municipality (Grant No. JCYJ20220530161010023)。
文摘Optical mode converters are essential for enhancing the capacity of optical communication systems. However, fabrication errors restrict the further improvement of conventional mode converters. To address this challenge, we have designed an on-chip TE0–TE1mode converter based on topologically protected waveguide arrays. The simulation results demonstrate that the converter exhibits a mode coupling efficiency of 93.5% near 1550 nm and can tolerate a relative fabrication error of 30%. Our design approach can be extended to enhance the robustness for other integrated photonic devices, beneficial for future development of optical network systems.
基金This work was supported by China Railway Corporation Science and Technology Research and Development Project(P2021J038).
文摘In recent years,switched inductor(SL)technology,switched capacitor(SC)technology,and switched inductor-capacitor(SL-SC)technology have been widely applied to optimize and improve DC-DC boost converters,which can effectively enhance voltage gain and reduce device stress.To address the issue of low output voltage in current renewable energy power generation systems,this study proposes a novel non-isolated cubic high-gain DC-DC converter based on the traditional quadratic DC-DC boost converter by incorporating a SC and a SL-SC unit.Firstly,the proposed converter’s details are elaborated,including its topology structure,operating mode,voltage gain,device stress,and power loss.Subsequently,a comparative analysis is conducted on the voltage gain and device stress between the proposed converter and other high-gain converters.Then,a closed-loop simulation system is constructed to obtain simulation waveforms of various devices and explore the dynamic performance.Finally,an experimental prototype is built,experimental waveforms are obtained,and the experimental dynamic performance and conversion efficiency are analyzed.The theoretical analysis’s correctness is verified through simulation and experimental results.The proposed converter has advantages such as high voltage gain,low device stress,high conversion efficiency,simple control,and wide input voltage range,achieving a good balance between voltage gain,device stress,and power loss.The proposed converter is well-suited for renewable energy systems and holds theoretical significance and practical value in renewable energy applications.It provides an effective solution to the issue of low output voltage in renewable energy power generation systems.
基金funded by the National Natural Science Foundation of China(52067013),and the Provincial Natural Science Foundation of Gansu(20JR5RA395).
文摘In the DC microgrid,the lack of inertia and damping in power electronic converters results in poor stability of DC bus voltage and low inertia of the DC microgrid during fluctuations in load and photovoltaic power.To address this issue,the application of a virtual synchronous generator(VSG)in grid-connected inverters control is referenced and proposes a control strategy called the analogous virtual synchronous generator(AVSG)control strategy for the interface DC/DC converter of the battery in the microgrid.Besides,a flexible parameter adaptive control method is introduced to further enhance the inertial behavior of the AVSG control.Firstly,a theoretical analysis is conducted on the various components of the DC microgrid,the structure of analogous virtual synchronous generator,and the control structure’s main parameters related to the DC microgrid’s inertial behavior.Secondly,the voltage change rate tracking coefficient is introduced to adjust the change of the virtual capacitance and damping coefficient flexibility,which further strengthens the inertia trend of the DC microgrid.Additionally,a small-signal modeling approach is used to analyze the approximate range of the AVSG’s main parameters ensuring system stability.Finally,conduct a simulation analysis by building the model of the DC microgrid system with photovoltaic(PV)and battery energy storage(BES)in MATLAB/Simulink.Simulation results from different scenarios have verified that the AVSG control introduces fixed inertia and damping into the droop control of the battery,resulting in a certain level of inertia enhancement.Furthermore,the additional adaptive control strategy built upon the AVSG control provides better and flexible inertial support for the DC microgrid,further enhances the stability of the DC bus voltage,and has a more positive impact on the battery performance.
文摘With the increasing awareness of environmental protection, people’s concern of pollution issues arising. Vehicles, as the most important means of transportation, its exhaust emission has received considerable attention. The catalytic converter is able to purify harmful substances in exhaust gas. The absolute content of precious metals in the catalytic converter dominates the exhaust gas purification effect. Accurate detection of precious metal content is of great significance for controlling the cost of catalysts, ensuring catalytic performance and recovering precious metals from spent catalysts. We herein summarized several instruments for precious metals content exploration, such as X-ray fluorescence spectrometer (XRF), atomic absorption spectrometer (AAS), inductively coupled plasma emission spectrometer (ICP) and spectrophotometer. In this thesis, the feasibility of using various devices for characterizing precious metal content in catalytic converters is analyzed and their strengths or weaknesses are elaborated.
基金supported in part by the Joint Funds of the National Natural Science Foundation of China(G02)(Grant No.U1834203)in part by of the Science and Technology Department of Sichuan Province(S01)(Grant No.2020JDTD0009)。
文摘In the modern wireless communication system,the manipulation for polarization of electromagnetic wave plays a important role in improving the capacity and reliability of communication.In this paper,a multifunctional polarization converter(MFPC)based on the multilayer reconfigurable metasurface is proposed,which can assist the source antenna to transmit and receive multiple polarization signals.The MFPC consists of a grating which can filter out the undesired polarization and four layers of metasurfaces incorporated with PIN diodes.The functions of the MFPC include LTC and LTL polarization conversions,co-polarization transmission and reflection for arbitrary polarization.By changing the states of PIN diodes,the functions of MFPC can be dynamically switched.Loaded on the aperture of source antenna,the proposed MFPC can serve as a transmissive array with multiple polarization channels,and can also provide EM protection for source antenna by reflecting the incoming interference waves.Cascading of the metasurfaces produces Fabry-Perot resonance in the MFPC,and it contributes to the realization of LTC and LTL polarization conversions.To verify the performance of the proposed MFPC,the prototype is fabricated and tested.The measured results show that the fractional bandwidths of four functions are all higher than 31.9% with transmission or reflection coefficients higher than-2 d B.The frequency band of each function is mainly concentrated in S-band.The measured data are in agreement with the simulated results.
基金supported by the National Natural Science Foundation of China (NSFC) under Grant Nos. 61925110, 61821091, 62004184 and 62234007the Key-Area Research and Development Program of Guangdong Province under Grant No. 2020B010174002
文摘We demonstrate superb large-area verticalβ-Ga_(2)O_(3)SBDs with a Schottky contact area of 1×1 mm^(2)and obtain a high-efficiency DC-DC converter based on the device.Theβ-Ga_(2)O_(3)SBD can obtain a forward current of 8 A with a forward volt-age of 5 V,and has a reverse breakdown voltage of 612 V.The forward turn-on voltage(VF)and the on-resistance(Ron)are 1.17 V and 0.46Ω,respectively.The conversion efficiency of theβ-Ga_(2)O_(3)SBD-based DC-DC converter is 95.81%.This work indicates the great potential of Ga_(2)O_(3)SBDs and relevant circuits in power electronic applications.
文摘This work focuses on the fuzzy controller for the proposed three-phase interleaved Step-up converter(ISC).The fuzzy controller for the proposed ISC converters for electric vehicles has been discussed in detail.The proposed ISC direct current(DC-DC)converter could also be used in automobiles,satellites,industries,and propulsion.To enhance voltage gain,the proposed ISC Converter combines boost converter and interleaved converter(IC).This design also reduces the number of switches.As a result,ISC converter switching losses are reduced.The proposed ISC Converter topology can produce a 143 V output voltage and 1 kW of power.Due to the high voltage gain of this converter design,it is suitable for medium and high-power systems.The proposed ISC Converter topology is simulated in MATLAB/Simulink.The simulated output displays a high output voltage.But the output voltage contains maximum ripples.Fuzzy proposes an ISC Converter which makes closed loop responsiveness and reduces the output voltage ripple.The proposed ISC converter has the lowest ripple output voltage,which is less than 2%,because the duty cycle is regulated using the fuzzy logic controller.It offers high voltage gain,minimal ripple,and low switching loss.The performance of the proposed converter is compared to that of the fuzzy and Pro-portional Integral(PI)controllers implemented in MATLAB.
基金supported by the National Natural Science Fundation (Grant Nos. 12134016 and 61625505)Chinese Academy of Sciences (Grant No. ZDBS-LY-JSC025)+1 种基金Sino– Russia International Joint Laboratory of Terahertz Materials and Devices (Grant No. 18590750500)Shanghai Municipal Science and Technology Major Project (Grant No. 2019SHZDZX01)。
文摘Terahertz wave is between microwave and infrared bands in the electromagnetic spectrum with the frequency range from 0.1 THz to 10 THz. Controlling and processing of the polarization state in terahertz wave are the focus due to its great influence on the characteristics. In this paper, a transmissive metasurface terahertz polarization converter is designed in 3D structure with an upper surface of ruler-like rectangular, an intermediate dielectric layer and a lower surface of metal grid wires. Numerical simulations of the converter show that the polarization conversion ratio(PCR) is above 99.9% at 0.288 THz–1.6 THz, the polarization rotation angle(PRA) is close to 90° at 0.06 THz–1.4 THz, and the ellipticity angle(EA) is close to 0° at 0.531 THz–1.49 THz. The origin of the efficient polarization conversion is explained by analyzing the electric field intensity, magnetic field intensity, surface current, electric field energy density, and magnetic field energy density distributions of the converter at 1.19 THz and 0.87 THz, which are consistent with the energy transmittance and transmittance coefficient. In addition, the effects of different thickness and material of intermediate layer, thickness of upper surface material, polarized wave incidence angle, and metasurface materials on the performance of the polarization converter are discussed, and how they affect the conversion performance of the polarization converter are also explained.Our results provide a strong theoretical basis and technical support to develop high performance transmission-type terahertz polarization converters, and play an important role to promote the development of terahertz science and technology.
文摘Currently, there are significant investments in the study of distributed generation, including solar energy by the photovoltaic conversion method. Basically, a cell directly converts solar energy to electricity. For this, static converters are required. However, relevant issues arise in this process: point of maximum efficiency of module generation, strategy of control of the flow of energy to the network. The aim of this work is to monitor the main variables of a photovoltaic system, specifically the voltage and current module and their derivates. The goal is to implement the maximum power tracking technique using Fuzzy logic. In addition, the energy provided by the cell will be employed in an inverter stage that can operate as an active filter, voltage regulator, or generator of reactive and active power. The feasibility of using Fuzzy logic will also be studied. The first stage of this work involves parameterization and simulation of photovoltaic modules. The initial study examines the compatibility of a commercial module and its catalog data with the results of simulation. The simulated I-V characteristics show almost identical results to the catalog data. In sequence, a boost or lift DC-DC converter is employed to emulate variable load for maximum power transfer.
基金supported by the National Natural Science Foundation of China(Grant Nos.52071348 and 51979129)the Natural Science Foundation of Jiangsu Province,China(Grant No.BK20201006)the Natural Science Research of Jiangsu Higher Education Institutions of China(Grant No.22KJA130001).
文摘A numerical simulation method based on CFD has been established to simulate the fully coupled motion for an atten-uator-type wave energy converter(WEC).Based on this method,a detailed parametric analysis has been conducted to investigate the design of the rafts.The effects of different parameters(wave parameters,structural parameters and PTO parameters)on the hydrodynamic characteristics of the attenuator-type WEC were studied in detail.The results show that in terms of wave parameters,there is an optimal wave period,which makes the relative pitching angle amplitude of the WEC reach the maximum,and the increase of wave height is conducive to the relative pitching angle amplitude of wave energy.Under different wave conditions,the relative pitch angle of the parallelogram raft device is the maximum.In terms of structural parameters,the parallelogram attenuator-type device has the optimal values in different relative directions,different distances and different apex angle,which makes the relative motion amplitude of the device reach the maximum,and the spacing and the apex angle have influence on the motion frequency of the device,while the relative direction has almost no influence on it.In terms of PTO parameters,there is an optimal damping coefficient,which makes the power generation efficiency of the WEC reach the maximum.The research results provide a valuable reference for future research and design of the attenuator-type WEC.
文摘In this paper,an optimized Genetic Algorithm(GA)based internal model controller-proportional integral derivative(IMC-PID)controller has been designed for the control variable to output variable transfer function of dc-dc boost converter to mitigate the effect of non-minimum phase(NMP)behavior due to the presence of a right-half plane zero(RHPZ).This RHPZ limits the dynamic performance of the converter and leads to internal instability.The IMC PID is a streamlined counterpart of the standard feedback controller and easily achieves optimal set point and load change performance with a single filter tuning parameterλ.Also,this paper addresses the influences of the model-based controller with model plant mismatch on the closed-loop control.The conventional IMC PID design is realized as an optimization problem with a resilient controller being determined through a genetic algorithm.Computed results suggested that GA–IMC PID coheres to the optimum designs with a fast convergence rate and outperforms conventional IMC PID controllers.