Rail-to-rail op-amp with constant transconductance,SR and gain

A novel general-purpose low-voltage rail-to-rail CMOS （ complementary metal-oxide-semiconductor transistor ） operational amplifier （op-amp）is introduced, which obtains constant transconductance, slew rate and constant high gain over the entire input common mode voltage range. The proposed scheme has the potential for applications in deep submicrometer technology, as the operation of the circuit does not exclusively rely on the square-law or the linear-law of transistors. The scheme is compact and suitable for applications as VLSI cell. The rail-to- rail op-amp has been implemented in DPDM 0. 6 μm mixedsignal process. The simulations show that in the entire range of input common mode voltage, the variations in transconductance, SR and gain are 1%, 2. 3%, 1.36 dB, respectively. Based on this, the layout and tape-out are carded out. The area of layout is 0. 072 mm^2. The test results are basically consistent with the circuit simulation.

High Transconductance AlGaN/GaN HEMT Growth on Sapphire Substrates

The fabrication and characterization of AlGaN/GaN high electron mobility transistors (HEMT) grown on sapphire substrates by MBE are described.These 1.0μm gate-length devices exhibit a maximum drain current density as high as 1000mA/mm and a maximum transconductance of 198mS/mm.In sharp c ontrast to high current density HEMT fabricated on sapphire substrates,the extrinsic transconductance versus gate-to-source voltage profiles exhibit the broad plateaus over a large voltage swing.A unity gain cutoff frequency (f T) of 18.7GHz and a maximum frequency of oscillation (f max) of 19.1GHz are also obtained.

Bias Current Compensation Method with 41.4% Standard Deviation Reduction to MOSFET Transconductance in CMOS Circuits

A simple and successful method for the stability enhancement of integrated circuits is presented. When the process parameters, temperature, and supply voltage are changed, according to the simulation results, this method yields a standard deviation of the transconductance of MOSFETs that is 41.4% less than in the uncompensated case. This method can be used in CMOS LC oscillator design.

Negative transconductance effect in p-GaN gate AlGaN/GaN HEMTs by traps in unintentionally doped GaN buffer layer

We investigate the negative transconductance effect in p-GaN gate AlGaN/GaN high-electron-mobility transistor(HEMT) associated with traps in the unintentionally doped GaN buffer layer. We find that a negative transconductance effect occurs with increasing the trap concentration and capture cross section when calculating transfer characteristics.The electron tunneling through AlGaN barrier and the reduced electric field discrepancy between drain side and gate side induced by traps are reasonably explained by analyzing the band diagrams, output characteristics, and the electric field strength of the channel of the devices under different trap concentrations and capture cross sections.

Degradation of the transconductance of a gate-modulated generation current in nMOSFET

The degradation of transconductance （G） of a gate-modulated generation current IGD in a LDD nMOSFET is investigated. The G curve shifts rightward under the single electron-injection-stress （EIS）. The trapped electrons located in the gate oxide over the LDD region （QL） makes the effective drain voltage diminish. Accordingly, the G peak in depletion （GMD） and that in weak inversion （GMw） decrease. It is found that △GMD and △GMw each have a linear relationship with the n-th power of stress time （tn） in a dual-log coordinate： △GMD octn, AGMD octn （n = 0.25）. During the alternate stress, the injected holes neutralize QL induced by the previous EIS. This neutralization makes the effective VD restore to the initial value and then the IGD peak recovers completely. Yet the threshold voltage recovery is incomplete due to the trapped electron located over the channel （Qc）. As a result, GMW only recovers to circa 50% of the initial value after the hole-injection-stress （HIS）. Instead, GMD almost recovers. The relevant mechanisms are given in detail.

Efficient Slew-Rate Enhanced Operational Transconductance Amplifier

Today, along with the prevalent use of portable equipment, wireless, and other battery powered systems, the demand for amplifiers with a high gain-bandwidth product（GBW）, slew rate（SR）, and at the same time very low static power dissipation is growing. In this work, an operational transconductance amplifier（OTA） with an enhanced SR is proposed. By inserting a sensing resistor in the input port of the current mirror in the OTA, the voltage drop across the resistor is converted into an output current containing a term in proportion to the square of the voltage, and then the SR of the proposed OTA is significantly enhanced and the current dissipation can be reduced. The proposed OTA is designed and simulated with a 0.5μm complementary metal oxide semiconductor（CMOS） process. The simulation results show that the SR is 4.54V/μs, increased by 8.25 times than that of the conventional design, while the current dissipation is only 87.3%.

Numerical simulation of transconductance of AlGaN/GaN heterojunction field effect transistors at high temperatures

Based on the investigation of the influence of temperatures on parameters, including polarization, electron mobility, thermal conductivity, and conduction band discontinuity at the interface between AlGaN and GaN, the temperature dependence of transconductance for AlGaN/GaN heterojunction field effect transistors （HFETs） has been obtained by using a quasi-two-dimensional approach, and the calculated results are in good agreement with the experimental data. The reduction in transconductance at high temperatures is primarily due to the decrease in electron mobility in the channel. Calculations also demonstrate that the self-heating effect becomes serious as environment temperature increases.

PARASITIC TOLERANT DIFFERENTIAL SC TRANSCONDUCTANCE USING UNITY GAIN BUFFERS

The unity gain buffer will be good to design high frequency SCF if its resistiveeffects can be eliminated,and therefore the whole parasitic sensitivities will greatly be reduced.On the basis of this concept,a novel parasitic tolerant SC DTE(differential transconductanceelement)is proposed.SC floating inductor and integrator fit for high frequency applications areformed by the DTE.The computer simulation and experiment on a third order elliptic LP filterverify its validity.

Realization of a New Current Mode Second-Order Biquad Using Two Current Follower Transconductance Amplifiers (CFTAs)

A new circuit for realization of universal current-mode filter using current Follower Transconductance Amplifiers (CFTAs) is presented. The proposed circuit realizes current-mode low pass, high pass and band pass filter functions simultaneously with a single current source at the input. The band reject and all pass filters can also be obtained from the proposed circuit without any extra hardware. The proposed circuit employs three passive grounded elements and two CFTAs. Linear electronic control of natural frequency ω0 is available in the proposed circuit. The quality factor can be independently adjusted through grounded resistor. The proposed circuit employs two grounded capacitors and a grounded resistor along with two CFTAs. The grounded resistor can be replaced by an OTA based circuit for linear electronic control of quality factor Q0. The circuit exhibits low active and passive sensitivities for ω0 and Q0. Simulation results are obtained using PSPICE software which is in conformity with the theoretical findings.

New Voltage Mode Sinusoidal Oscillator Using Voltage Differencing Transconductance Amplifiers (VDTAs)

The purpose of this paper is to introduce a new electronically controlled voltage mode sinusoidal oscillator (VMSO) using Voltage Differencing Transconductance Amplifiers (VDTA). The proposed circuit provides electronic control of ω0 and independent condition of oscillation (CO). It is found that the oscillator works very satisfactorily and pure sinusoidal waveforms are available at the outputs. The PSPICE simulation confirms the theoretical results. The proposed oscillator circuit employs only two VDTAs, along with two grounded capacitor and single grounded resistor. The circuit exhibits low active and passive sensitivities for ω0. Simulation results are obtained by using PSPICE software with TSMC CMOS 0.18 um process parameters.

Current Mode Universal Filter Using Single Current Controlled Differential Difference Current Conveyor Transconductance Amplifier

This research paper contains a new electronically tunable current-mode biquadratic universal filter using a new active building block;current controlled differential difference current conveyor transconductance amplifier (CCDDCCTA). The proposed filter provides the following important and desirable features: (i) One can use only one CCDDCCTA and two capacitors;(ii) One can get low pass (LP), band pass (BP), high pass (HP), notch (NF) and all pass (AP) current responses from the same configuration without any alteration;(iii) Passive components are grounded, which ease the integrated circuit implementation;(iv) Responses are electronically tunable;and (v) Sensitivity is low. Moreover, the non-ideality analysis shows that the parasitic passive components can be compensated for the proposed circuit. The functionality of the design is verified through SPICE simulations using 0.25 μm CMOS TSMC technology process parameters. Simulation result agrees well with the theoretical analysis.

Transconductance bimodal effect of PDSOI submicron H-gate MOSFETs

A bimodal effect of transconductance was observed in narrow channel PDSOI sub-micron H-gate PMOSFETs,which was accompanied with the degeneration of device performance.This paper presents a study of the transconductance bimodal effect based on the manufacturing process and electrical properties of those devices.It is shown that this effect is caused by a diffusion of donor impurities from the NC region of body contact to the PC poly gate at the neck of the H-gate,which would change the work function differences of the polysilicon gate and substrate.This means that the threshold voltage of the device is different in the width direction,which means that there are parasitic transistors paralleled with the main transistor at the neck of the H-gate.The subsequent devices were fabricated with layout optimization,and it is demonstrated that the bimodal transconductance can be eliminated by mask modification with NC implantation more than 0.2 m away from a poly gate.

Low voltage floating gate MOSFET based current differencing transconductance amplifier and its applications

This article presents a low voltage low power configuration of current differencing transconductance amplifier（CDTA）based on floating gate MOSFET.The proposed CDTA variant operates at lower supply voltage±1.4 V with total static power dissipation of 2.60 mW due to the low voltage feature of floating gate MOSFET.High transconductance up to 6.21 mA/V is achieved with extended linear range of the circuit i.e.±130μA.Two applications are illustrated to demonstrate the effectiveness of the proposed active block.A quadrature oscillator is realized using FGMOS based CDTA,two capacitors,and a resistor.The resistor is implemented using two NMOSFETs to provide high linearity and tunablility.Another application is the Schmitt trigger circuit based on the proposed CDTA variant.All circuits are simulated by using SPICE and TSMC 130 nm technology.

A review on GaN HEMTs:nonlinear mechanisms and improvement methods

The GaN HEMT is a potential candidate for RF applications due to the high frequency and large power handling capability.To ensure the quality of the communication signal,linearity is a key parameter during the system design.However,the GaN HEMT usually suffers from the nonlinearity problems induced by the nonlinear parasitic capacitance,transconductance,channel transconductance etc.Among them,the transconductance reduction is the main contributor for the nonlinearity and is mostly attributed to the scattering effect,the increasing resistance of access region,the self-heating effect and the trapping effects.Based on the mechanisms,device-level improvement methods of transconductance including the trapping suppression,the nanowire channel,the graded channel,the double channel,the transconductance compensation and the new material structures have been proposed recently.The features of each method are reviewed and compared to provide an overview perspective on the linearity of the GaN HEMT at the device level.

Strained Si-Channel Heterojunction n-MOSFET

The process parameters are adjusted and the process procedure is simplified on the basis of precursor's work and the strained Si channel SiGe n MOSFET is fabricated successfully.This n MOSFET takes the strained Si layer(which is deposited on the relaxed SiGe buffer layer) as current channel and can provide a 48 5% improvement in electron mobility while keeping the gate voltage as 1V.

Systematic Synthesis of Compressive VDTA-Based T-T Filter with Orthogonal Control of f_o and Q

Based on sixteen nullor-mirror models of the voltage differencing transconductance amplifier (VDTA) and port admittance matrices of the tow-Thomas (T-T) filter with orthogonal control between the characteristic frequency(f_0) and figure of merit (Q),two different categories of the voltage-mode and transconductance-mode T-T filters are synthesized by the means of the nodal admittance matrix (NAM) expansion method.The category A filter that employs two compressive VDTAs and two grounded capacitors includes four structures,and the category B filter that uses two compressive VDTAs,two grounded capacitors,and one grounded resistor,also includes four structures.These circuits are suitable for integrated circuit manufacture,and their parameters f_0 and Q can be orthogonally adjusted with varying the bias currents of VDTAs.After the paper and pencil test is completed,the computer analyses,including alternating current (AC),parameter sweep,Monte Carlo (MC),and noise analyses,are performed to support the synthesis approach.

Universal Current-Mode Biquad Filter Using a VDTA

This paper presents a new current-mode single input multi output (SIMO) type biquad employing one voltage differencing transconductance amplifier (VDTA), two grounded capacitors and a single grounded resistor. The configuration realizes all basic filter functions (i.e. Low Pass (LP), High Pass (HP), Band Pass (BP), Notch (BR) and All Pass (AP)). The natural frequency (ω0) and bandwidth (BW) are independently tunable. The workability of proposed configuration has been verified using SPICE simulation with TSMC CMOS 0.18 μm process parameters.

THE DESIGN OF ACTIVE CURRENT-MODE FILTER WITH STATE VARIABLE METHOD

Basing on the state variable method, a block diagram of the current-mode biquad active circuit was proposed, whose integrators were realized using three kinds of active elements such as operational amplifier, second generation current conveyors and operational transconduc-tance amplifiers-electric capacity. The characteristics of each circuit were analyzed.

DOCCII-based electronically tunable current-mode biquadratic filters

A complete state variable current-mode biquadratic filter built by duo-output CCII (DOCCII) with variable current gain is presented. All the coefficients of the filter can be independently tuned through the variable current gain factors of the DOCCII. Based on the principles upon which the general biquadratic filter was constructed, a universal electronically tunable current-mode filter is proposed which implements the low-pass, high-pass, band-pass, band-suppress and all-pass second order transfer functions simultaneously. The PSPICE simulations of frequency responses of second-order filter of are also given.

Depletion Mode HEMT with Refractory Metal Silicide WSi Gate

Depletion mode HEMT with refractory metal silicide WSi gate has been designed and fabricated. Epitaxial modulation doping materials were grown by a home-made MBE system. The gate length and width for low noise depletion devices were 1.2-1.5 μm and 2 × 160 μm respectively. The electron mobility of the fabricated devices is typically 6 080 cm2/V.s at 300K and 68 000 cm2/V.s at 77K. The sheet electron concentration ns is 9 × 10 11 cm-2. The source-drain contacts with AuGeNi/Au were fabricated using evaporating and lift-off technique. to further reduce the contact resistance, the wafer was alloyed at 520 ℃ for 3 min in the hydrogen (H2) gas. Schottky gate was formed using WSi. The transconductance of the depletion mode device is 110～130 mS/mm at room temperature. The devices can be applied in communication satellite at microwave frequency of 3. 83 GHz and radar receiver at 1. 5 GHz. Its noise figure is about 2～3 dB.