Towards Post-Quantum Cryptography Using Thermal Noise Theory and True Random Numbers Generation

The advent of quantum computers and algorithms challenges the semantic security of symmetric and asymmetric cryptosystems. Thus, the implementation of new cryptographic primitives is essential. They must follow the breakthroughs and properties of quantum calculators which make vulnerable existing cryptosystems. In this paper, we propose a random number generation model based on evaluation of the thermal noise power of the volume elements of an electronic system with a volume of 58.83 cm3. We prove through the sampling of the temperature of each volume element that it is difficult for an attacker to carry out an exploit. In 12 seconds, we generate for 7 volume elements, a stream of randomly generated keys of 187 digits that will be transmitted from source to destination through the properties of quantum cryptography.

Parameter analysis of chaotic superlattice true random number source

Superlattices in chaotic state can be used as a key part of a true random number generator. The chaotic characteristics of the signal generated in the superlattice are mostly affected by the parameters of the superlattice and the applied voltage, while the latter is easier to adjust. In this paper, the model of the superlattice is first established. Then, based on this model, the chaotic characteristics of the generated signal are studied under different voltages. The results demonstrate that the onset of chaos in the superlattice is typically accompanied by the mergence of multistability, and there are voltage intervals in each of which the generated signal is chaotic.

Design of Hybrid True Random Number Generator for Cryptographic Applications

In real-time applications,unpredictable random numbers play a major role in providing cryptographic and encryption processes.Most of the existing random number generators are embedded with the complex nature of an amplifier,ring oscillators,or comparators.Hence,this research focused more on implementing a Hybrid Nature of a New Random Number Generator.The key objective of the proposed methodology relies on the utilization of True random number generators.The randomness is unpredictable.The additions of programmable delay lines will reduce the processing time and maintain the quality of randomizing.The performance comparisons are carried out with power,delay,and lookup table.The proposed architecture was executed and verified using Xilinx.The Hybrid TRNG is evaluated under simulation and the obtained results outperform the results of the conventional random generators based on Slices,area and Lookup Tables.The experimental observations show that the proposed Hybrid True Random Number Generator(HTRNG)offers high operating speed and low power consumption.

True Random Number Generator Realized by Extracting Entropy from a Negative-Inductance Superconducting Quantum Interference Device

A new type of superconductive true random number generator (TRNG) based on a negative-inductance superconducting quantum interference device (nSQUID) is proposed. The entropy harnessed to generate random numbers comes from the phenomenon of symmetry breaking in the nSQUID. The experimental circuit is fabricated by the Nb-based lift-off process. Low-temperature tests of the circuit verify the basic function of the proposed TRNG. The frequency characteristics of the TRNG have been analyzed by simulation. The generation rate of random numbers is expected to achieve hundreds of megahertz to tens of gigahertz.

A high-speed true random number generator based on Ag/SiNx/n-Si memristor

The intrinsic variability of memristor switching behavior can be used as a natural source of randomness,this variability is valuable for safe applications in hardware,such as the true random number generator(TRNG).However,the speed of TRNG is still be further improved.Here,we propose a reliable Ag/SiNx/n-Si volatile memristor,which exhibits a typical threshold switching device with stable repeat ability and fast switching speed.This volatile-memristor-based TRNG is combined with nonlinear feedback shift register(NFSR)to form a new type of high-speed dual output TRNG.Interestingly,the bit generation rate reaches a high speed of 112 kb/s.In addition,this new TRNG passed all 15 National Institute of Standards and Technology(NIST)randomness tests without post-processing steps,proving its performance as a hardware security application.This work shows that the SiNx-based volatile memristor can realize TRNG and has great potential in hardware network security.

LETRNG—A Lightweight and Efficient True Random Number Generator for GNU/Linux Systems

Unpredictable and irreproducible digital keys are required to modulate security-related information in secure communication systems.True random number generators(TRNGs)rather than pseudorandom number generators(PRNGs)are required for the highest level of security.TRNG is a significant component in the digital security realm for extracting unpredictable binary bitstreams.Presently,most TRNGs extract high-quality“noise”from unpredictable physical random phenomena.Thus,these applications must be equipped with external hardware for collecting entropy and converting them into a random digital sequence.This study introduces a lightweight and efficient true random number generator(LETRNG)that uses the inherent randomness of a central processing unit(CPU)and an operating system(OS)as the source of entropy.We then utilize a lightweight post-processing method based on XOR and fair coin operation to generate an unbiased random binary sequence.Evaluations based on two famous test suites(NIST and ENT)show that LETRNG is perfectly capable of generating high-quality random numbers suitable for various GNU/Linux systems.

Design and validation of high speed true random number generators based on prime-length ring oscillators

This paper presents a wide supply voltage range, high speed true random number generator（TRNG） based on ring oscillators, which have different prime number of inverters. And a simple Von Neumann corrector as post processing is also realized to improve data randomness. Prototypes have been implemented and fabricated in 0.18 μm complementary metal oxide semiconductor（CMOS） technology with a wide range of supply voltage from 1.8 V to 3.6 V. The circuit occupies 4 500 μm2, and dissipates minimum 160 μW of power with sampling frequency of 20 MHz. Output bit rate range is from 100 kbit/s to 20 Mbit/s. Statistical test results, which were achieved from the die Hard battery of tests, demonstrate that output random numbers have a well characteristic of randomness.

A hybrid-type quantum random number generator

This paper proposes a well-performing hybrid-type truly quantum random number generator based on the time interval between two independent single-photon detection signals, which is practical and intuitive, and generates the initial random number sources from a combination of multiple existing random number sources. A time-to-amplitude converter and multichannel analyzer are used for qualitative analysis to demonstrate that each and every step is random. Furthermore, a carefully designed data acquisition system is used to obtain a high-quality random sequence. Our scheme is simple and proves that the random number bit rate can be dramatically increased to satisfy practical requirements.

Ensuring Quality of Random Numbers from TRNG: Design and Evaluation of Post-Processing Using Genetic Algorithm

Random numbers generated by pseudo-random and true random number generators (TRNG) are used in a wide variety of important applications. A TRNG relies on a non-deterministic source to sample random numbers. In this paper, we improve the post-processing stage of TRNGs using a heuristic evolutionary algorithm. Our post-processing algorithm decomposes the problem of improving the quality of random numbers into two phases: (i) Exact Histogram Equalization: it modifies the random numbers distribution with a specified output distribution;(ii) Stationarity Enforcement: using genetic algorithms, the output of (ii) is permuted until the random numbers meet wide-sense stationarity. We ensure that the quality of the numbers generated from the genetic algorithm is within a specified level of error defined by the user. We parallelize the genetic algorithm for improved performance. The post-processing is based on the power spectral density of the generated numbers used as a metric. We propose guideline parameters for the evolutionary algorithm to ensure fast convergence, within the first 100 generations, with a standard deviation over the specified quality level of less than 0.45. We also include a TestU01 evaluation over the random numbers generated.

基于时钟抖动流水线结构的高效率真随机数发生器

现代加密系统对密钥随机性的需求不断增加。使用时序抖动、热噪声、亚稳态等作为熵源的真随机数发生器,因其可以提供高质量的随机性成为该领域的研究热点。因此,提出一种可配置、轻量级、高效率的真随机数发生器。该发生器使用基于随机数学模型的设计方法,由差分构架的两级时钟抖动流水线组成。第一级流水线中两个环形振荡器在规定时间内累积抖动,第二级流水线利用近似相同的两个环形振荡器的微小周期差构建时间数字转换器,对第一级输出的高斯抖动进行量化,通过数字化模块输出随机比特。在时间数字转换器运行过程中,第一级流水线已经重新启动累积下一个阶段的抖动,减少了空闲时间,提高了真随机数的质量和效率。在Xilinx Atrix-7平台进行了验证,该结构的硬件资源仅消耗了25个LUTs和13个DFFs,获得高达32.55 Mb/s的吞吐量。

基于亚稳态叠加单元的高吞吐量真随机数发生器设计

真随机数发生器(TRNG)作为一类重要的硬件安全原语,在密钥生成、初始化向量和协议中的身份认证等加密领域得到应用。为设计出高吞吐量的轻量级TRNG,该文研究了利用多路选择器(MUX)和异或门(XOR gate)的开关特性来产生亚稳态的方法,提出一种基于亚稳态叠加单元(MS-cell)的TRNG(MS-TRNG)设计。它将MUX和异或门触发的亚稳态进行叠加,从而提高TRNG的熵。所提TRNG分别在Xilinx Virtex-7和Xilinx Artix-7 FPGA开发板中实现,无需后处理电路。与其他先进的TRNG相比,所提TRNG具有最高的吞吐量和极低的硬件开销,并且它所生成的随机序列通过了NIST测试和一系列性能测试。

基于28 nm RRAM的可重构真随机数发生器

基于阻变存储器(RRAM)电流饥饿型环形振荡器的真随机数发生器(TRNG)方案,提出交替读写的操作模式,优化熵源重构机制.针对现有RRAM在多操作周期下跨导线性化问题,提出熵可配置电阻窗口钳位电路.通过减小电阻窗口获得RRAM非线性的最大化,所提电路能够有效避免RRAM出现过度置位、过度复位的现象,保证熵源稳定性.基于UMC 28 nm HKMG工艺对TRNG进行流片.输出数据统计性测试结果通过了NIST SP800-22所有测试集的真随机数标准测试.检测结果表明,在高斯分布的95%置信区间,所有统计数据的自相关函数值均落在-0.003~0.003,输出序列具有良好的随机性.

基于碳基500nm工艺的双采样真随机数发生器

碳纳米管场效应晶体管(CNTFET)因其极小的尺寸、超高的载流子迁移率、准一维结构的弹道输运等特性,顺应了未来集成电路高集成化和微型化的发展趋势。基于课题组构建的500 nm碳基工艺设计包,设计了一款真随机数发生器(TRNG)。碳基真随机数发生器利用慢时钟振荡器对快时钟振荡器进行采样获取随机源,通过在慢时钟振荡器中添加电阻热噪声以增加环形振荡器的相位抖动,经单比特频数测试、重叠子序列检测等随机性测试,证实本设计提高了熵源的非相关性与不可预测性。碳基真随机数发生器的最高工作频率达到7.04 MHz,功耗为1.98 mW,版图面积为2.3 mm×1.5 mm。输出序列通过了随机性检验,适用于现代密码系统的纳米级芯片。

基于抖动的高速真随机数发生器的设计和实现

针对当前真随机数生成器(TRNG)中存在的问题,基于振荡环中的抖动(Jitter)设计了一种高速真随机数发生器,通过二次采样来改善随机数的随机性以及输出的稳定性,采用基于线性反馈移位寄存器(LFSR)的后处理,以很小的硬件代价改善了随机数的统计特性。本设计在Altera Cyclone III的FPGA(Field Programmable Gate Array)板上实现,通过通用串行总线(USB)与计算机通讯,得到速率达到20 Mbps的高速真随机数发生器。

随机数发生器探讨及一种真随机数发生器实现

高质量随机数在信息安全中具有重要的应用。该文利用双重随机思想,基于真随机源对一个高质量伪随机数发生器进行参数重置,同时对该伪随机数发生器产生的随机数的特定二进制位进行采样从而获得0-1序列,将之填充到一个整数单元,归一化后作为输出。分析表明,该真随机数发生器具有良好的性能。

基于压控振荡器的真随机数发生器设计

通过对频率抖动机理的研究,提出一种基于压控振荡器(Voltage-Controlled Oscillator,VCO)的真随机数发生器(True Random Number Generator,TRNG)设计方案.该方案将电阻热噪声放大后作为VCO的控制信号使其振荡频率在中心频率附近随机抖动. VCO所产生的慢振荡信号对周期固定的快振荡信号采样生成原始随机序列,然后利用后处理电路提高序列均匀性并消除自相关性.通过热噪声发生器调节VCO的中心频率可实现序列比特率和随机性之间的权衡.所提电路采用SMIC 55nm CMOS工艺设计,芯片面积0. 0124mm2,比特率10Mbps,平均功率0. 81mW.输出的随机序列通过NIST SP 800-22测试.

一种基于环形振荡器的轻量级高效率的真随机数发生器

真随机数发生器(TRNG)作为芯片中重要的安全组件,在现代加密系统中扮演着越来越重要的角色。对于TRNG的设计,关键是需要熵提取器可以在恶劣的环境变化(如工艺波动、电压和温度(PVT))下稳定地生成熵值。基于Xilinx FPGA平台提出了一种基于环形振荡器的低成本,高效率真随机数发生器。TRNG一方面通过快速进位逻辑来提高熵提取的效率,另一方面通过优化电路结构和延迟,在以相对较低的资源开销情况下实现可观的吞吐量和随机性。TRNG分别在多块Xilinx Virtex6 FPGAs和Xilinx Spartan6 FPGAs上进行验证,实验数据测试结果表明,所提出的TRNG能够在广泛的PVT范围内表现出良好的鲁棒性,且生成的随机比特流不仅以相当高P值通过NIST SP800-22统计测试套件,而且可以通过最新的NIST SP800-90B测试。

信息安全系统中一种实用的随机数产生方法

介绍一种利用电路内部噪声信号做成随机序列发生器的设计和工作原理,并对它输出序 列进行密码学意义上的随机性和安全性分析。这种随机数发生器可以集成在芯片内,也可以利用该 芯片做成一种基于微机总线的随机数产生卡。所以,它可以很方便地用于各种信息安全系统中,为这 些系统的安全提供有力的保障。

口令的安全分析及真随机数在金融安全中的应用

文章介绍了口令安全,对金融系统的口令安全进行了分析,提出了两种用于提高金融系统安全的口令系统:随机口令系统和动态口令系统,这两种系统也可以用于其它网络安全中。

故障扰动下振荡环型真随机数发生器安全特性及度量方法研究

作为密码安全性的根源,在各类密码体制和系统中,真随机数起着不可替代的重要作用。现实中,真随机数往往基于随机物理过程实现,从而使其可能遭受环境引入或攻击者恶意施加的影响,造成随机数生成质量的下降,进而对密码应用安全性产生威胁。该文以当前广泛应用的基于振荡环的真随机数发生器(RO-TRNG)为对象,对故障注入场景下,熵源和熵抽取部分受到的影响及由此造成的安全性变异进行了深入分析和研究,并基于捕获偏置度提出了能够充分反映故障扰动场景下RO-TRNG安全特性的度量模型。实验表明,该度量模型能够很好地反映在遭受故障扰动时,RO-TRNG在抖动方差累积和节拍延迟链上升沿捕获概率偏置等方面受到的影响,并对RO-TRNG在高危复杂环境下的安全性实施客观分析。