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基于iOS开发的自动化单元测试研究与运用
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作者 陈剑峰 姚进元 《电子质量》 2024年第2期40-43,共4页
Xcode是苹果开发的集成开发环境,用于创建macOS、iOS、watchOS和tvOS应用程序。主要介绍了其中的单元测试集成工具,即Unit Testing Bundle单元测试和UI Testing Bundle单元测试。Unit Testing Bundle单元测试可以帮助开发人员验证和确... Xcode是苹果开发的集成开发环境,用于创建macOS、iOS、watchOS和tvOS应用程序。主要介绍了其中的单元测试集成工具,即Unit Testing Bundle单元测试和UI Testing Bundle单元测试。Unit Testing Bundle单元测试可以帮助开发人员验证和确保应用程序中各个模块的功能和逻辑的正确性,通过编写测试代码来对特定模块进行测试,并检查其预期行为是否符合预期。通过运行Unit Testing Bundle,可以快速地发现和解决潜在问题,提高应用程序的质量和可靠性。UI Testing Bundle单元测试是UI用户界面交互单元测试工具,用于编写和执行UI自动化测试。通过模拟用户操作和验证应用程序行为,开发人员可以确保应用程序的用户界面在各种情况下的预期交互。UI Testing Bundle是一个强大而全面的工具,有助于开发人员提高应用程序的稳定性和用户体验。 展开更多
关键词 单元测试集成 Unit testing Bundle ui testing Bundle
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Dynamic avalanche behavior of power MOSFETs and IGBTs under unclamped inductive switching conditions 被引量:3
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作者 陆江 田晓丽 +3 位作者 卢烁今 周宏宇 朱阳军 韩郑生 《Journal of Semiconductors》 EI CAS CSCD 2013年第3期26-30,共5页
The ability of high-voltage power MOSFETs and IGBTs to withstand avalanche events under unclamped inductive switching(UIS) conditions is measured.This measurement is to investigate and compare the dynamic avalanche fa... The ability of high-voltage power MOSFETs and IGBTs to withstand avalanche events under unclamped inductive switching(UIS) conditions is measured.This measurement is to investigate and compare the dynamic avalanche failure behavior of the power MOSFETs and the IGBT,which occur at different current conditions.The UIS measurement results at different current conditions show that the main failure reason of the power MOSFETs is related to the parasitic bipolar transistor,which leads to the deterioration of the avalanche reliability of power MOSFETs.However,the results of the IGBT show two different failure behaviors.At high current mode,the failure behavior is similar to the power MOSFETs situation.But at low current mode,the main failure mechanism is related to the parasitic thyristor activity during the occurrence of the avalanche process and which is in good agreement with the experiment result. 展开更多
关键词 uiS test parasitic bipolar transistor power MOSFETs IGBT parasitic thyristor
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Avalanche behavior of power MOSFETs under different temperature conditions 被引量:2
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作者 陆江 王立新 +2 位作者 卢烁今 王雪生 韩郑生 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2011年第1期27-32,共6页
The ability of high-voltage power MOSFETs to withstand avalanche events under different temperature conditions are studied by experiment and two-dimensional device simulation. The experiment is performed to investigat... The ability of high-voltage power MOSFETs to withstand avalanche events under different temperature conditions are studied by experiment and two-dimensional device simulation. The experiment is performed to investigate dynamic avalanche failure behavior of the domestic power MOSFETs which can occur at the rated maximum operation temperature range (-55 to 150 ℃). An advanced ISE TCAD two-dimensional mixed mode simulator with thermodynamic non-isothermal model is used to analyze the avalanche failure mechanism. The unclamped inductive switching measurement and simulation results show that the parasitic components and thermal effect inside the device will lead to the deterioration of the avalanche reliability of power MOSFETs with increasing temperature. The main failure mechanism is related to the parasitic bipolar transistor activity during the occurrence of the avalanche behavior. 展开更多
关键词 uiS test device simulation ELECTROTHERMAL parasitic bipolar transistor power MOSFETs
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