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Cycle-Based Algorithm Used to Accelerate VHDL Simulation
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作者 杨勋 刘明业 《Journal of Computer Science & Technology》 SCIE EI CSCD 2000年第4期383-387,共5页
Cycle-based algorithm has very high performance for the simulation of synchronous design, but it is confined to synchronous design and it is not asaccurate as event-driven algorithm. In this paper, a revised cycle-bas... Cycle-based algorithm has very high performance for the simulation of synchronous design, but it is confined to synchronous design and it is not asaccurate as event-driven algorithm. In this paper, a revised cycle-based algorithm isproposed and implemented in VHDL simulator. Event-driven simulation engine andcycle-based simulation engine have been imbedded in the same simulation environment and can be used to asynchronous design and synchronous design respectively.Thus the simulation performance is improved without losing the flexibility and accuracy of event-driven algorithm. 展开更多
关键词 vhdl simulator event-driven algorithm cycle-based algorithm levelization
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Performance Analysis of AODV Routing forWireless Sensor Network in FPGA Hardware
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作者 Namit Gupta Kunwar Singh Vaisla +2 位作者 Arpit Jain Adesh Kumar Rajeev Kumar 《Computer Systems Science & Engineering》 SCIE EI 2022年第3期1073-1084,共12页
Wireless sensor network(WSN)is a group of interconnected sensor nodes that work wirelessly to capture the information of surroundings.The routing of the network is a challenging task.The routing of WSN is classified a... Wireless sensor network(WSN)is a group of interconnected sensor nodes that work wirelessly to capture the information of surroundings.The routing of the network is a challenging task.The routing of WSN is classified as proactive,reactive,and hybrid.Adhoc on-demand distance vector(AODV)routing is an example of reactive routing based on the demand route formations among different nodes in the network.The research article emphasizes the design and simulation of the AODV routing hardware chip using very-high-speed integrated circuit hardware description language(VHDL)programming in Xilinx integrated synthesis environment(ISE)14.7 software.The performance of the chip is studied based on the field-programmable gate array(FPGA)hardware parameters such as slices,lookup table(LUTs),input/output block(IOB),flipflops,and memory for the different configurations of the network(N=10,20….100).The delay and frequency are also estimated on the Virtex-5 FPGA.The performance of the WSN with AODV routing is also analyzed based on the packet delivery ratio,throughput,delay,and control overhead.The simulation test cases verified the 8-bit,64-bit,and 128-bit data communication within the nodes. 展开更多
关键词 Wireless sensor network FPGA synthesis AODVrouting simulation and synthesis vhdl simulation
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