Macroblock-level decoding and deblocking method and its pipeline implementation in H.264 decoder SOC design

This paper presents a macroblock-level (MB-level) decoding and deblocking method for supporting the flexible macroblock ordering (FMO) and arbitrary slice ordering (ASO) bit streams in H.264 decoder and its SOC/ASIC implementation. By searching the slice containing the current macroblock in the bit stream and switching slices correctly, MBs can be decoded in the raster scan order, while the decoding process can immediately begin as long as the slice containing the current MB is available. This architectural modification enables the MB-level decoding and deblocking 3-stage pipeline, and saves about 20% of SDRAM bandwidth. Implementation results showed that the design achieves real-time decoding of 1080HD (1920×1088@30 fps) at a system clock of 166 MHz.

面向SOC平台的高效H.264解码架构及实现

提出了一种面向SOC平台的高效H.264解码架,通过解码和去块效应的宏块级流水线化处理,解决了视频流支持灵活的宏块排序(FMO)和任意条带顺序(ASO)技术时码流内的宏块次序与去块效应操作中要求的光栅扫描顺序不同的矛盾,更有利于硬件实现。在硬件设计中,采用cache缓存法暂存用于去块效应的临时数据,同时采用双并行总线满足较高的系统带宽要求。FPGA和SOC的实现结果表明,在系统时钟为166 MHz时,设计结果完全满足1080HD(1920×1088@30 fps)的解码要求。