如何在先进工艺节点利用Virtuoso Check/Assertion Flow

Virtuoso和MMSIM有效结合,完整的Check/Assertion flow包含:在图形界面设置Check/Assert,通过仿真得到Check/Assert的结果,在图形界面直接显示Check/Assert的结果,对结果进行各种灵活的后处理,并在schematic直接进行反标。该流程可以覆盖电路设计常用check需求,完全不依赖脚本,图形界面让工程师更容易上手,基于瞬态仿真的Dynamic Check相比其他工具更具优势。有效利用Check/Assert flow,可以帮助避免或及早发现设计中的一些常见问题,从而减少设计迭代,该流程在TSMC 16 nm和Intel 14 nm实际项目上得到应用,很大程度地提高了设计效率。

Extremist Politics as an Instrument of Ethnic Assertions among the Bodos of Northeast India

Ethnic assertions worldwide have assumed different forms ranging from moderate methods of articulation of autonomy to extremist means of violent struggle. Resort to extremism by some sections of an ethnic group usually triggers inter-ethnic conflicts with other groups on the one hand and leads to confrontation with the state on the other. This paper seeks to examine the dynamics of this phenomenon in the context of Bodos, the largest plains tribe of Assam, a State of Northeast India. The paper enquires as to whether extremist politics has met the Bodo aspirations for self-determination or has intensified the conflicts and contradictions within the Bodo society with ramifications for other ethnic groups inhabiting the Bodo-dominated areas. It is also necessary to explore the responses of the Union and State governments to Bodo extremist politics for an understanding of the conflict management process.

Literature Assertions of John Dryden Reflected in Mac Flecknoe

John Dryden’s poem Mac Flecknoe satirizes his literary enemy Thomas Shadwell by the aid of the image of Flecknoewhile it reveals some of his literature assertions.This paper tries to expound them from the following three perspectives:the attitudes towards Ben Johnson,the proposals for drama language and the selection,and the attitudes towards French classicism forthe purpose of a further understanding about John Dryden.

Evaluating and Constraining Hardware Assertions with Absent Scenarios

Mining from simulation data of the golden model in hardware design verification is an effective solution to assertion generation.While the simulation data is inherently incomplete,it is necessary to evaluate the truth values of the mined assertions.This paper presents an approach to evaluating and constraining hardware assertions with absent scenarios.A Belief-fail Rate metric is proposed to predict the truth/falseness of generated assertions.By considering both the occurrences of free variable assignments and the conflicts of absent scenarios,we use the metric to sort true assertions in higher ranking and false assertions in lower ranking.Our Belief-failRate guided assertion constraining method leverages the quality of generated assertions.The experimental results show that the Belief-failRate framework performs better than the existing methods.In addition,the assertion evaluating and constraining procedure can find more assertions that cover new design functionality in comparison with the previous methods.

A QUANTIFIER-ELIMINATION BASED HEURISTIC FOR AUTOMATICALLY GENERATING INDUCTIVE ASSERTIONS FOR PROGRAMS

A method using quantifier-elimination is proposed for automatically generating program invariants/inductive assertions. Given a program, inductive assertions, hypothesized as parameterized formulas in a theory, are associated with program locations. Parameters in inductive assertions are discovered by generating constraints on parameters by ensuring that an inductive assertion is indeed preserved by all execution paths leading to the associated location of the program. The method can be used to discover loop invariants-properties of variables that remain invariant at the entry of a loop. The parameterized formula can be successively refined by considering execution paths one by one; heuristics can be developed for determining the order in which the paths are considered. Initialization of program variables as well as the precondition and postcondition, if available, can also be used to further refine the hypothesized invariant. The method does not depend on the availability of the precondition and postcondition of a program. Constraints on parameters generated in this way are solved for possible values of parameters. If no solution is possible, this means that an invariant of the hypothesized form is not likely to exist for the loop under the assumptions/approximations made to generate the associated verification condition. Otherwise, if the parametric constraints are solvable, then under certain conditions on methods for generating these constraints, the strongest possible invariant of the hypothesized form can be generated from most general solutions of the parametric constraints. The approach is illustrated using the logical languages of conjunction of polynomial equations as well as Presburger arithmetic for expressing assertions.

Default Logic About Assertions

G.Brewka presented a modified default logic (CDL) and obtained some properties of CDL,such as the existence of extensions,semimonotonicity,which the Reiters normal default logic shares.The Reiter’s default has been generalized,a default logic about assertion’s has been obtained,and the assertion that the Brewka’s CDL is a special normal default logic of the new version has been proved.

New method for query answering in semantic web

To promote the efficiency of knowledge base retrieval based on description logic, the concept of assertional graph （AG）, which is directed labeled graph, is defined and a new AG-based retrieval method is put forward. This method converts the knowledge base and query clause into knowledge AG and query AG by making use of the given rules and then makes use of graph traversal to carry out knowledge base retrieval. The experiment indicates that the efficiency of this method exceeds, respectively, the popular RACER and KAON2 system by 0.4% and 3.3%. This method can obviously promote the efficiency of knowledge base retrieval.

基于断言的硬件功能验证技术

针对排除芯片设计流程中RTL级的错误时,需要花费大量时间看仿真波形与日志文件的问题,本文介绍了基于断言的硬件功能验证技术的基础,以及利用断言技术在黑盒验证中测试一设备输出信号时的应用,总结了断言验证的优点,以及断言与半形式化验证结合的特点,断言技术与动态仿真、形式验证、激励自动生成等技术结合,能更快更有效的发现硬件设计过程中RTL级的错误,成为验证方法学的焦点。

断言技术在SOC验证中的应用

主要阐述了基于断言技术新硬件验证平台用于实时监测设计描述是否违反了设计目标,提出了OVA的特点及应用,并以LCD controller的sharp接口时序为实例讲解了该方法的优点。

SoC中多层AHB总线的断言验证应用

随着SoC设计复杂程度的不断提高,芯片的功能验证面临的挑战越来越大。断言作为一种描述属性的方法,可以快速地验证设计代码是否满足系统要求。基于断言的验证方法学近年来发展极为迅速,应用也越来越广泛。在基于Multi-layer AHB总线架构上的SoC系统验证过程中,采用System Verilog Assertion验证方法,证明SVA是SoC设计过程中功能验证的一种有效的验证方法。

一种基于SAML带自验证的单点登录模型

应用系统的安全问题一直备受重视,身份认证是一种常用的安全实现方式。本文分析了现有的身份认证方式的种种弊端,提出了一种基于SAML技术的带自验证单点登录模型,并对这种模型进行了安全性分析。

Multiple Factorial Analysis of Symbolic Data

This document presents an extension of the multiple factorial analysis to symbolic data and especially to space data. The analysis makes use of the characteristic coding method to obtain active individuals and the reconstitutive coding method for additional individuals in order to conserve the variability of assertion objects. Traditional analysis methods of the main components are applied to coded objects. Certain interpretation aids are presented after the coding process. This method was applied to poverty data.

SystemVerilog断言及其应用

在介绍SystemVerilog断言的概念、使用断言的好处、断言的分类、断言的组成以及断言如何被插入到被测设计(DUT)的基础上,本文详细地介绍了如何使用不同的断言语句对信号之间的复杂时序关系进行严格的检查,并针对每个例子展示了在ModelSim6.1b仿真环境中所显示的波形。本文旨在帮助读者理解如何使用断言对设计中信号间复杂时序关系进行验证的方法,并由此介绍一些基本的SystemVerilog断言、操作符、代码段和断言验证方法学。

Design and Implementation of DBC Based on Dynamic AOP

Traditional approach of design by contract, due to mixing the contract code with application code, is difficult for the extensibility and reusability of software system. This paper presents a framework named JADBC for design by contract based on Aspect-Oriented Programming （AOP） to resolve these problems. By providing a new modularized element, aspect, the framework successfully separates the contracts in design by contract, from functional codes. The implementation of this framework is based on dynamic AOP which can have the contract changed at rtmtime, consequently, enhancing program flexibility. JADBC framework modularizes the contracts in a clear-cut fashion that is easier to design, implement, and maintain.

Intelligent binary schema matching system in heterogeneity environment

For the past three decades, interoperability among heterogeneous systems had been a hard nut to crack due to the schematic and semantic perspectives that exist between objects. These systems were built under different data models. As such, levels of the local schemas are semantically very poor due to the limited expressiveness of traditional data models in which they were designed. Further more, most of the existing schema integration architectural components are inadequately equipped to handle the mapping schemas, especially when the semantics and structural conflicts are involved. This paper introduces an Intelligent Binary Schema Matching system (IBSMS), which exploits the phenomenon of making its components intelligent. That’s equipping its components such as translators and integrators with adequate knowledge about various data models. This allows the components acquire enough intelligence to maneuver or manipulate the correspondence between constructs from different models. In addition, the system has a Binary Matcher, which compares the attribute correspondences of various databases in a pairwise form, in order to establish the equivalences. With the establishment of the mappings, the users shall be able to access them (mappings) for their desired usage.

OVA技术在接口时序验证中的应用

本文主要阐述了基于断言技术并结合动态仿真,形式测试,测试激励自动化等方法的新硬件验证平台,着重介绍了O-VA的特点及运用,并以LCD controller的sharp接口为实例讲解了该方法的优点。

Separation of Fault Tolerance and Non-Functional Concerns: Aspect Oriented Patterns and Evaluation

Dependable computer based systems employing fault tolerance and robust software development techniques demand additional error detection and recovery related tasks. This results in tangling of core functionality with these cross cutting non-functional concerns. In this regard current work identifies these dependability related non-functional and cross-cutting concerns and proposes design and implementation solutions in an aspect oriented framework that modularizes and separates them from core functionality. The degree of separation has been quantified using software metrics. A Lego NXT Robot based case study has been completed to evaluate the proposed design framework.

断言(assert)在c\c++编程中的使用

该文主要讨论assert宏在c\c++编程中的作用、用法以及使用的原则和注意事项。

自定义ASSERT宏

提出修改标准的ASSERT宏的方法,对断言进行改进。详细分析在某些场合, 标准断言无法发挥作用的原因,通过分析Windows下的结构化异常处理机制给出修改方案;为了方便进一步修改断言对话框的显示内容和功能,重写调用断言对话框函数。

Peer educator training program for enhancing knowledge on issues in the growth and development of adolescents and risk behavior problems in Indonesian context

Objective： This article aimed to evaluate the effects of an educational intervention programme on improving peer educator （PE） knowledge in issues around growth and development and its risk behavior problems of adolescents in Indonesia. Methods： The study was conducted in 31 of PEs to evaluate their knowledge in adolescents. The PEs received health education and were assessed by individual work during the structured three-week programme. Data were collected before and after the training programme as pre- and post-tests. Results： The PE demonstrated significant improvements in their knowledge after attending the three-week structured training programme. The post-test scores had significant effects on the dimensions of PE knowledge scores. The PE become knowledgeable to maintain and monitor adolescents health issues around growth and development and its risk behavior problems of adolescents. Conclusions： The PE become knowledgeable to respond to the adolescent problems and readiness to become PE during puberty.