Performance Comparison of Three Algorithms Applied to UM2000 Signal Demodulation

UM2000 signal is a type of multi-audio frequency-modulated signal which is widely used for railway blocking. Principles of three typical demodulating algorithms are presented in details in this paper. Bit error rates of the three methods at different SNRs are achieved by Monte Carlo simulation experiments. Among the three algorithms, the quadrature demodulation has the best performance at the real working environment. However, the three methods have the same problem of phase hopping when noise is too strong.

An internal power angle control strategy for high-speed sensorless brushless DC motors

High-speed Brushless DC Motors(BLDCMs)usually adopt a sensorless control strategy and operate in three-phase six-state drive mode.However,the sampling errors of the rotor position and the driving method increase the Internal Power Angle(IPA),resulting in a decrease in the efficiency of the system.Conventional IPA reduction strategies are either sensitive to motor parameters,or ignore diode freewheeling during the commutation process,or require additional current sensors.In this paper,a new strategy to reduce the IPA is proposed.Firstly,a Zero-Crossing Point(ZCP)detection method for the back-EMF without filter is proposed to reduce the sampling errors of the rotor position.Secondly,the relationship between the non-energized terminal voltage and the ZCP of the corresponding back-EMF is analyzed.The non-energized terminal voltage that has completed the diode freewheeling is divided into two triangles by half of the bus voltage.When the IPA is suppressed,the areas of the two triangles are equal.Thirdly,an advanced angle for reducing the IPA is obtained through a PI regulator which can eliminate the deviation between the two areas.Finally,both a simulation model and an experimental circuit are built to verify the proposed control strategy.

50 MHz dual-mode buck DC–DC converter

A 50 MHz 1.8/0.9 V dual-mode buck DC-DC converter is proposed in this paper. A dual-mode control for high-frequency DC-DC converter is presented to enhance the conversion efficiency of light-load in this paper. A novel zero-crossing detector is proposed to shut down synchronous rectification transistor NMOS when the inductor crosses zero, which can decrease the power loss caused by reverse current and the trip point is adjusted by regulating IBIAS （BIAS current）. A new logic control for pulse-skipping modulation loop is also presented in this paper, which has advantages of simple structure and low power loss. The proposed converter is realized in SMIC 0.18μm 1-poly 6-metal mixed signal CMOS process. With switching loss, conduction loss and reverse current related loss optimized, an efficiency of 57% is maintained at 10 mA, and a peak efficiency of 71% is measured at nominal operating conditions with a voltage conversion of 1.8 to 0.9 V.