Two-dimensional analysis of the interface state effect on current gain for a 4H-SiC bipolar junction transistor

This paper studies two-dimensional analysis of the surface state effect on current gain for a 4H-SiC bipolar junction transistor （BJT）. Simulation results indicate the mechanism of current gain degradation, which is surface Fermi level pinning leading to a strong downward bending of the energy bands to form the channel of surface electron recombination current. The experimental results are well-matched with the simulation, which is modeled by exponential distributions of the interface state density replacing the single interface state trap. Furthermore, the simulation reveals that the oxide quality of the base emitter junction interface is very important for 4H-SiC BJT performance.

MODEL AND MODELING OF LOW TEMPERATURE CURRENT GAIN OF POLYSILICON EMITTER BIPOLAR TRANSISTORS

A unified model of low temperature current gain of polysilicon emitter bipolar transistors based on effective recombination method is presented, incorporating band-gap narrowing, carrier freezing-out, tunneling of holes through polysilicon/silicon interface oxide layer and reduced mobility mechanism in polysilicon. The modeling results based on this model are in good agreement with experimental data.

Thermal analytic model of current gain for bipolar junction transistor-bipolar static induction transistor compound device

This paper proposes a thermal analytical model of current gain for bipolar junction transistor-bipolar static induction transistor （BJT-BSIT） compound device in the low current operation. It also proposes a best thermal compensating factor to the compound device that indicates the relationship between the thermal variation rate of current gain and device structure. This is important for the design of compound device to be optimized. Finally, the analytical model is found to be in good agreement with numerical simulation and experimental results. The test results demonstrate that thermal variation rate of current gain is below 10% in 25 ℃-85 ℃ and 20% in -55 ℃-25 ℃.

A novel 4H-SiC lateral bipolar junction transistor structure with high voltage and high current gain

In this paper, a novel structure of a 4H-SiC lateral bipolar junction transistor （LBJT） with a base tield plate and double RESURF in the drift region is presented. Collector-base junction depletion extension in the base region is restricted by the base field plate. Thin base as well as low base doping of the LBJT therefore can be achieved under the condition of avalanche breakdown. Simulation results show that thin base of 0.32 μm and base doping of 3 × 1017 cm 3 are obtained, and corresponding current gain is as high as 247 with avalanche breakdown voltage of 3309 V when the drift region length is 30 μm. Besides, an investigation of a 4H-SiC vertical BJT （VBJT） with comparable breakdown voltage （3357 V） shows that the minimum base width of 0.25 ~tm and base doping as high as 8 × 10^17 cm^-3 contribute to a maximum current gain of only 128.

Fabrication and characterization of 4H-SiC bipolar junction transistor with double base epilayer

In this paper we report on a novel structure of a 4H-SiC bipolar junction transistor with a double base epilayer that is continuously grown. The measured dc common-emitter current gain is 16.8 at Ic = 28.6 mA （Jc = 183.4 A/cm2）, and it increases with the collector current density increasing. The specific on-state resistance （Rsp-on） is 32.3 mΩ.cm2 and the open-base breakdown voltage reaches 410 V. The emitter N-type specific contact resistance and N＋ emitter layer sheet resistance are 1.7× 10-3 Ω.cm2 and 150 Ω/□, respectively.

NPN型双极晶体管中子位移损伤差异实验研究

利用西安脉冲反应堆(Xi’an pulsed reactor,XAPR)的稳态中子对NPN型双极晶体管(NPN bipolar junction transistor,NPN-BJT)进行中子辐照实验,开展NPN-BJT不同固定发射极电流I_(E)条件下的中子位移损伤差异研究。研究结果表明:同一I_(E)条件下,集成NPN-BJT与2N2222A NPN-BJT的电流增益退化都随辐照中子注量的增加呈逐渐增强趋势;在同一中子注量辐照下,随双极晶体管固定I_(E)的增大,中子辐射损伤常数K_(τ)降低,中子辐照前后电流增益的变化量减小,晶体管电流增益退化程度减弱,因此在一定范围内,提高固定I_(E)可在一定程度上增强NPN-BJT抗中子辐射能力。

A novel structure of a high current gain 4H-SiC BJT with a buried layer in the base

In this paper, a new structure of a 4H-SiC bipolar junction transistor （BJT） with a buried layer （BL） in the base is presented. The current gain shows an approximately 100% increase compared with that of the conventional structure. This is attributed to the creation of a built-in electric field for the minority carriers to transport in the base which is explained based on 2D device simulations. The optimized design of the buried layer region is also considered by numeric simulations.

一种模拟输出CMOS温度传感器的设计与实现

为了实现片上系统温度监测,设计了一款基于0.18μm CMOS工艺的模拟输出温度传感器,该温度传感器核心部分包括偏置电路和感温电路,辅助部分包括单位增益缓冲器电路和端口静电保护电路。偏置电路采用低压共源共栅电流镜结构,感温电路采用直接堆叠多个PNP管的方式,将外界温度转化为具有负温度系数的线性电压信号。再经过基于轨到轨运算放大器的单位增益缓冲器输出,得到模拟电压输出的温度信号。该温度传感器的结构简单、易于设计,并且具有较大输出电压范围。其中核心部分的面积约为0.056 mm^(2),当电源电压为5 V时,静态电流约为6μA。芯片经过流片,测试结果显示,测量温度范围在-55~120℃时,对应的输出电压为2.6~0.7 V,温度误差在3℃以内。

Model of radiation-induced gain degradation of NPN bipolar junction transistor at different dose rates

Ionizing-radiation-induced current gain degradation in NPN bipolar junction transistors is due to an increase in base current as a result of recombination at the surface of the device. A model is presented which identifies the physical mechanism responsible for current gain degradation. The increase in surface recombination velocity due to interface states results in an increase in base current. Besides, changing the surface potential along the base surface induced by the oxide-trapped charges can also lead to an increased base current. By combining the production mechanisms of oxide-trapped charges and interface states, this model can explain the fact that the current gain degradation is more severe at a low dose rate than at a high dose rate. The radiations were performed in a Co60 source up to a total dose of 70 krad（Si）. The low dose rate was 0.1 rad（Si）/s and the high dose rate was 10 rad（Si）/s. The model accords well with the experimental results.

High current gain 4H-SiC bipolar junction transistor

A novel 4H-SiC BJT of high current gain with a suppressing surface traps effect has been proposed. It is effective to improve the current gain due to the lower electrons density in the surface region by extending the emitter metal to overlap the passivation layer on the extrinsic base surface. The electrons trapped in the extrinsic base surface induce the degeneration of Si C BJTs device performance. By modulating the electron recombination rate, the novel structure can increase the current gain to 63.2% compared with conventional ones with the compatible process technology. Optimized sizes are an overlapped metal length of 4 m, as well as an oxide layer thickness of 50 nm.

双极型晶体管电流增益温度特性的研究

修正了电流增益表达式。对样品3DK105B在不同温度点下进行测试分析。考虑样品理想因子n随温度的变化、VBE随温度的变化,以及禁带宽度随温度变化对电流增益的影响,对电流增益表达式进行了修正,使修正后的结果更加接近实际测试结果。

微波倍频器的设计与研制

针对微波倍频器的实现途径,介绍了阶跃管倍频和三极管倍频的原理,其中三端非线性电阻微波倍频器可实现有增益倍频,且倍频效率高,稳定性好,在现代通信系统中有着广泛的应用前景。应用ADS软件对倍频电路进行优化仿真,利用集总参数电容和电感对阻抗进行匹配,设计利用晶体三极管通过两次4倍频实现了L波段16倍频,最终成功研制出性能优良的L波段16倍频器,输出功率10.67 dBm,杂波抑制>75 dB,谐波抑制>60 dB,电流仅为120 mA,频谱纯净度较好,温度稳定性较高,能够有效实现倍频功能,满足微波频率源系统的使用要求。

基于三极管的CFBR-Ⅱ堆辐射损伤常数测定

为获取CFBR-II堆与其他装置建立辐射损伤等效系数的实验依据,在CFBR-II堆稳态工况下开展典型三极管的辐射损伤常数测定工作。结果表明,硅三极管的辐射损伤常数在4×10-16～6×10-16 cm2之间;对于直流增益与中子注量的线性关系的适用范围,集电极注入电流可以拓展到300 mA。

小尺寸双极超β晶体管的TCAD设计与优化

基于TCAD一体化系列工具,实现了小尺寸双极性超β晶圆管芯的工艺级及器件物理特性级的 设计与优化。提出了基区宽度接近90nm层次下的小尺寸双极性超β晶体管的工艺实施方案。经TSUPREM -Ⅳ和MEDICI一体化仿真、参数提取及特性的验证表明,设计方案完全可以达到器件参数的要求。

H_（FE）超低温度系数的硅双极晶体管

随着高可靠电子技术的发展，要求硅双极器件的电流增益Ｈ_（ＦＥ）具有很低的正温度系数．发射区重掺杂引起的禁带变窄效应是常规硅双极晶体管Ｈ_（ＦＥ）具有较高正温度系数的主要原因．为了减小这一正温度系数，结合发射区轻掺杂技术，我们采用了新颖的多晶硅部分发射区、多晶硅发射区和非晶硅发射区等结构，获得了电性能优异的Ｈ_（ＦＥ）超低温度系数的硅双极器件，Ｈ_（ＦＥ）的１２５℃高温上升率和－５５℃低温下降率均小于２０％，有些甚至小于１０％．

InGaP/GaAs HBT器件的制备及其特性

采用在发射区台面腐蚀时保留InGaP钝化层和去除InGaP钝化层的方法制备了两种InGaP/Ga As异质结双极晶体管(HBT)器件,研究了InGaP钝化层对HBT器件基区表面电流复合以及器件直流和射频微波特性的影响。对制备的两种器件进行了对比测试后得到:保留InGaP钝化层的HBT器件最大直流增益(β)为130,最高振荡频率(fmax)大于53 GHz,功率附加效率达到61%,线性功率增益为23 dB;而去除InGaP钝化层的器件最大β为50,f_(max)大于43 GHz,功率附加效率为57%,线性功率增益为18 dB。测试结果表明,InGaP钝化层作为一种耗尽型的钝化层能有效抑制基区表面电流的复合,提高器件直流增益,改善器件的射频微波特性。

77K多晶硅发射区双极型晶体管

本文介绍了适于77K工作的多晶硅发射区双极型晶体管,给出了在不同工作电流条件下的电流增益的温度模型。结果表明在小电流条件下电流增益随温度下降而下降得更为剧烈,并且讨论了在不同注入情况下,浅能级杂质的陷阱作用对截止频率的影响。

SiGe基区异质结晶体管电流和频率特性的解析模型

给出了一个适用于分析SiGe基区异质结晶体管电流和频率特性的解析模型,并利用该模型分析了基区掺杂和组分均级变的SiGe异质结晶体管的电流增益、截止频率、最高振荡频率。模型中考虑了由于基区重掺杂和Ge的掺入引起的禁带窄变效应、载流子速度饱和效应。解析模型的计算结果与实验的对比证实了本模型可适用于器件的优化设计和电路的模拟。

低温多晶硅发射极晶体管电流增益模型和模拟

本文考虑禁带变窄效应、载流子冻析效应和多晶硅/单晶硅界面复合与氧化层隧穿效应,采用有效复合速度方法,建立了多晶硅发射极晶体管电流增益的温度关系模型。模拟计算结果与实验符合较好。

双极晶体管的瞬时中子辐射损伤规律试验研究

瞬时中子辐射损伤效应是评价电子器件抗辐射能力的一项重要指标。利用晶体管直流增益的倒数与中子注量呈线性关系这一特点,采用参数一致性好的硅双极晶体管3DK9D作为位移损伤探测器,通过在线监测晶体管直流增益随累积中子注量的变化,获得了双极晶体管对脉冲中子辐照的响应特性。结果表明,晶体管的瞬时辐射效应是电离损伤和位移损伤共同作用的结果。在相同累计中子注量下,瞬态辐照损伤效应远强于稳态辐照损伤结果。