为了解决传统变换器电压增益低的问题,将Boost变换器与Cuk变换器进行并联集成,并利用耦合电感倍压技术提高变换器的电压增益。设计而成的高增益耦合电感组合Boost-Cuk变换器保留了Cuk变换器输出电流的连续性,新型结构中使用无源钳位来...为了解决传统变换器电压增益低的问题,将Boost变换器与Cuk变换器进行并联集成,并利用耦合电感倍压技术提高变换器的电压增益。设计而成的高增益耦合电感组合Boost-Cuk变换器保留了Cuk变换器输出电流的连续性,新型结构中使用无源钳位来吸收漏感能量,对寄生电容与漏感谐振引起的电压尖峰起到约束作用,降低了开关管的电压应力。描述了变换器电感电流连续模式(Continuous current mode,CCM)下的运行特点,并进行了该变换器的参数设计。最后,通过搭建一台100 W的试验样机来求证理论的正确性。展开更多
A new method for reducing the substrate rated losses of integrated spiral inductors is presented.The method is to block the eddy currents induced by spiral inductors by directly forming pn junction isolation in the S...A new method for reducing the substrate rated losses of integrated spiral inductors is presented.The method is to block the eddy currents induced by spiral inductors by directly forming pn junction isolation in the Si substrate. The substrate pn junction can be realized by using the standard silicon technologies without any additional processing steps.Integrated inductors on silicon are designed and fabricated. S parameters of the inductor based equivalent circuit are investigated and the inductor parameters are calculated.The impacts of the substrate pn junction isolation on the inductor quality factor are studied.The experimental results show that substrate pn junction isolation in certain depth has achieved a significant improvement.At 3GHz,the substrate pn junction isolation increases the inductor quality factor by 40%.展开更多
A new structure of the on- chip integrated inductors im plem ented in conventional Si process is presented as a lateral solenoid.The fabrication process utilizes a conventional Si technology with standard double- lay...A new structure of the on- chip integrated inductors im plem ented in conventional Si process is presented as a lateral solenoid.The fabrication process utilizes a conventional Si technology with standard double- layer m etal- lization.S param eters of the inductors based equivalent circuit are investigated and the inductor parameters are cal- culated from the m easured data.Experimental results are presented on an integrated inductors fabricated in a lateral solenoid type utilizing double m etal layers rather than a single metal layer as used in conventional planar spiral de- vices.Inductors with peak Q of 1.3and inductance value of 2 .2 n H are presented,which are com parable to conven- tional planar spiral inductors.展开更多
To decrease the metal losses of RF spiral inductor,a novel layout structure with gradually reduced metal line width and space from outside to inside is presented. This gradual changed inductor has less eddy-current ef...To decrease the metal losses of RF spiral inductor,a novel layout structure with gradually reduced metal line width and space from outside to inside is presented. This gradual changed inductor has less eddy-current effect than the conventional inductor of fixed metal width and space. So the series resistance can be reduced and the quality （Q） factor of the inductor relating to metal losses is increased. The obtained experimental results corroborate the validity of the proposed method. For a 6nH inductor on high-resistivity silicon at 2.46GHz,Q factor of 14.25 is 11.3% higher than the conventional inductor with the same layout size. This inductor can be integrated with radio frequency integrated circuits to gain better performance in RF front end of a wireless communication system.展开更多
文摘为了解决传统变换器电压增益低的问题,将Boost变换器与Cuk变换器进行并联集成,并利用耦合电感倍压技术提高变换器的电压增益。设计而成的高增益耦合电感组合Boost-Cuk变换器保留了Cuk变换器输出电流的连续性,新型结构中使用无源钳位来吸收漏感能量,对寄生电容与漏感谐振引起的电压尖峰起到约束作用,降低了开关管的电压应力。描述了变换器电感电流连续模式(Continuous current mode,CCM)下的运行特点,并进行了该变换器的参数设计。最后,通过搭建一台100 W的试验样机来求证理论的正确性。
文摘A new method for reducing the substrate rated losses of integrated spiral inductors is presented.The method is to block the eddy currents induced by spiral inductors by directly forming pn junction isolation in the Si substrate. The substrate pn junction can be realized by using the standard silicon technologies without any additional processing steps.Integrated inductors on silicon are designed and fabricated. S parameters of the inductor based equivalent circuit are investigated and the inductor parameters are calculated.The impacts of the substrate pn junction isolation on the inductor quality factor are studied.The experimental results show that substrate pn junction isolation in certain depth has achieved a significant improvement.At 3GHz,the substrate pn junction isolation increases the inductor quality factor by 40%.
文摘A new structure of the on- chip integrated inductors im plem ented in conventional Si process is presented as a lateral solenoid.The fabrication process utilizes a conventional Si technology with standard double- layer m etal- lization.S param eters of the inductors based equivalent circuit are investigated and the inductor parameters are cal- culated from the m easured data.Experimental results are presented on an integrated inductors fabricated in a lateral solenoid type utilizing double m etal layers rather than a single metal layer as used in conventional planar spiral de- vices.Inductors with peak Q of 1.3and inductance value of 2 .2 n H are presented,which are com parable to conven- tional planar spiral inductors.
文摘To decrease the metal losses of RF spiral inductor,a novel layout structure with gradually reduced metal line width and space from outside to inside is presented. This gradual changed inductor has less eddy-current effect than the conventional inductor of fixed metal width and space. So the series resistance can be reduced and the quality （Q） factor of the inductor relating to metal losses is increased. The obtained experimental results corroborate the validity of the proposed method. For a 6nH inductor on high-resistivity silicon at 2.46GHz,Q factor of 14.25 is 11.3% higher than the conventional inductor with the same layout size. This inductor can be integrated with radio frequency integrated circuits to gain better performance in RF front end of a wireless communication system.
