Switched-mode AGC circuits with internally created reset module for burst-mode unbalanced data optical receiver

This paper presents an innovative switched-mode auto gain control （AGC） circuit with internally created reset module for DC-10Mb/s burst-mode unbalanced （BMU） optical data transmission. Conventional AGC circuit is inappropriate for BMU data transmission because it is based on average level detection and requires considerable time to settle on a predefined gain. Therefore, we adopt a fast switched-mode AGC based on peak level detection. After the gain is adjusted, the peak level detectors need to re-detect the peak level of the input signal. Thus, we develop an internally created reset module. This AGC with reset module exhibits a fast operation and achieves an adjusted stable gain within one-bit, avoiding any bit loss up to 10Mb/s data rate. During power-up, the peak level detectors possibly hold an uncertain level resulting in the bit-errors. We propose a power-up reset circuit to solve this problem. Designed in a 0.5μm CMOS technology, the circuit achieves an optical sensitivity of better than -30dBm and a wide dynamic range of over 30dB with a power dissipation of only 30 mW from a 5V supply.

Concept and Design of a Novel High-Bandwidth,High-Sensitivity Differential Receiver for Optical Interconnections

A novel high-bandwidth, high-sensitivity differential optical receiver without any additional cost compared to general optical receivers, is proposed for high-speed optical communications and interconnections. High bandwidth and high sensitivity are achieved through a fully differential transimpedance amplifier with balanced input loads and two photodetectors to convert the incident light into a pair of differential photogenerated currents,respectively. In addition,a corresponding 0.35μm standard CMOS optoelectronic integrated receiver with two 60μm × 30μm, 1. 483pF fingered p^＋/n- well/p-substrate photodiodes is also presented. The simulation results demonstrate that it achieves a 1.37GHz bandwidth and a 81.9dBΩ transimpedance gain,supporting data rates up to at least 2Gbit/s. The device consumes a core area of 0. 198mm^2 and the optical sensitivity is at least - 13dBm for a 10^-12 bit error rate under a 2^15 - 1 PRBS input signal.

A 10Gb/s GaAs PHEMT High Gain Preamplifier for Optical Receivers

A high gain cascade connected preamplifier for optical receivers is developed with 0.5μm GaAs PHEMT technology from the Nanjing Electronic Devices Institute. To begin with, the transimpedance amplifier has a -3dB bandwidth of 10GHz, with a small signal gain of around 9dB. The post-stage distributed amplifier （DA） has a -3dB bandwidth of close to 20GHz,with a small signal gain of around 12dB. As a whole,the cascade preamplifier has a measured small signal gain of 21.3dB and a transimpedance of 55.3dBΩ in a 50Ω system. With a higher signal-to-noise ratio than that of the TIA and a markedly improved waveform distortion compared with that of the DA, the measured output eye diagram for 10Gb/s NRZ pseudorandom binary sequence is clear and symmetric.

2.5 Gbit/s monolithic ICs for optical fiber transmitter and receiver in 0.35 μm CMOS process

2.5 Gbit/s monolithic integrated circuits （ICs） for optical fiber transmitter and receiver in 0.35 μm CMOS （complementary metal-oxide-semiconductor transistor） process are presented. The transmitter, which includes a 4： 1 multiplexer and a laser diode driver （LDD）, has four 622 Mbit/s random signals as its inputs and gets a 2.5 Gbit/s driving signal as its output; the receiver detects a 2.5 Gbit/s random signal and gets four 622 Mbit/s signals at the output. The main circuits include a trans-impedance amplifier （TIA）, a limiting amplifier, a clock and data recovery （CDR） unit, and a 1： 4 demultiplexer （DEMUX）. Test results prove the logic functions of the transmitter to be right, and the 10% to 90% rise and fall times of transmitter＇s output data eye diagram are 211.1 ps and 200 ps, respectively. The sensitivity of the receiver is measured to be better than 20 mV. The root mean square jitter of the DEMUX＇s output data is 15.6 ps and that of the clock after 1： 4 frequency dividing is 1.9 ps. Two chips are both applicable to 2.5 Gbit/s optical fiber communication systems.

Relationship Between Noise Figure and Equivalent Input Noise Current Spectral Density for Optical Receiver Design

Based on the equivalent circuit model of a two-port optical receiver front-end,the relationship between the equivalent input noise current spectral density and the noise figure is analyzed. The derived relationship has universal validity for determining the equivalent input noise current spectral density for optical receiver designs, as verified by measuring a 155Mb/s high-impedance optical receiver front.end. Good agreement between calculated and simulated results has been achieved.

A 0.5mV High Sensitivity 200Mbps CMOS Limiting Amplifier with RSSI for Optical Receivers

A 0. 5mV high sensitivity,200Mbps CMOS limiting amplifier （LA） with 72dB ultra wide dynamic range is described. A novel active DC offset cancellation loop is elaborately analyzed and designed to achieve this performance. Using a signal path, a received signal strength indicator （RSSI）, based on the piecewise-linear approximation, is realized with a ± 2dB logarithmic accuracy in a 60dB indicating range. The architecture of the LA and RSSI employed is determined by the optimal sensitivity and RSSI accuracy for a specified speed, gain, and power consumption. It consumes 60mW from a single 5V supply. The active area is 1.05mm^2 using standard 5V 0.6μm CMOS technology.

A 26-Gb/s CMOS optical receiver with a reference-less CDR in 65-nm CMOS

This paper presents a 26-Gb/s CMOS optical receiver that is fabricated in 65-nm technology. It consists of a tripleinductive transimpedance amplifier(TIA), direct current(DC) offset cancellation circuits, 3-stage gm-TIA variable-gain amplifiers(VGA), and a reference-less clock and data recovery(CDR) circuit with built-in equalization technique. The TIA/VGA frontend measurement results demonstrate 72-dB? transimpedance gain, 20.4-GHz-3-dB bandwidth, and 12-dB DC gain tuning range. The measurements of the VGA’s resistive networks also demonstrate its efficient capability of overcoming the voltage and temperature variations. The CDR adopts a full-rate topology with 12-dB imbedded equalization tuning range. Optical measurements of this chipset achieve a 10-12 BER at 26 Gb/s for a 2;-1 PRBS input with a-7.3-dBm input sensitivity. The measurement results with a 10-dB @ 13 GHz attenuator also demonstrate the effectiveness of the gain tuning capability and the built-in equalization. The entire system consumes 140 mW from a 1/1.2-V supply.

The 8×10 GHz Receiver Optical Subassembly Based on Silica Hybrid Integration Technology for Data Center Interconnection

An 8×10 GHz receiver optical sub-assembly （ROSA） consisting of an 8-channel arrayed waveguide grating （AWG） and an 8-channel PIN photodetector （PD） array is designed and fabricated based on silica hybrid integration technology. Multimode output waveguides in the silica AWG with 2% refractive index difference are used to obtain fiat-top spectra. The output waveguide facet is polished to 45° bevel to change the light propagation direction into the mesa-type PIN PD, which simplifies the packaging process. The experimentM results show that the single channel I dB bandwidth of AWG ranges from 2.12nm to 3.06nm, the ROSA responsivity ranges from 0.097 A/W to 0.158A/W, and the 3dB bandwidth is up to 11 GHz. It is promising to be applied in the eight-lane WDM transmission system in data center interconnection.

Design of Si-bipolar Monolithic Main Amplifier IC for Optical Fiber Receivers

A broadband amplifier with transadmittance and transimpedance stages is designed and two types of improved AGC amplifiers are developed on the base of theory study. Making use of the basic amplifier cells, a main amplifier IC for optical-fiber receivers is deliberated. By computer simulating the performances of the designed main amplifier meet the necessity of high gain and wide dynamic range . They are maximum voltage gain of 42 dB, the bandwidth of 730 MHz,the input signal( V p-p )range from 5 mV to 1 V,the output amplitude about 1 V, the dynamic range of 46 dB. The designed circuit containing no inductance and large capacitance will be convenient for realizing integration. A monolithic integrated design of 622 Mb/s main amplifier is completed.

Design of 10 Gbit/s burst-mode transimpedance preamplifier for PON systems

A 10 Gbit/s burst-mode preamplifier is designed for passive optical networks （PONs）. To achieve a high dynamic range and fast response, the circuit is DC coupled, and a feed-back type peak detector is designed to perform auto-gaincontrol and threshold extraction. Regulated cascade （RGC） architecture is exploited as the input stage to reduce the input impedance of the circuit and isolate the large parasitic capacitance including the photodiode capacitance from the determination pole, thus increasing the bandwidth. This preamplifier is implemented using the low-cost 0. 13 ixm CMOS technology. The die area is 425 μm × 475 μm and the total power dissipation is 23.4 mW. The test results indicate that the preamplifier can work at a speed from 1.25 to 10.312 5 Gbit/s, providing a high transimpedance gain of 64.0 dBΩ and a low gain of 54. 6 dBl2 with a dynamic input range of over 22.9 dB. The equivalent input noise current is 23. 4 pA/ Hz1/2. The proposed burst amplifier satisfies related specifications defined in 10G-EPON and XG-PON standards.

2.5 Gb/s Optical Transponder技术与设计

网络容量增长的同时也促进了光纤通信技术的发展,使得宽带传输和接入方式处于越来越重要的地位,如何有效地解决光纤干线上和大部分基于电缆局域网的信号转换成为亟待解决的问题,光收发器(opticaltransponder)很好地解决了宽带传输和接入的这一“瓶颈”问题。2.5 Gb/s是目前最流行的传输速率,其相应transponder用于SDH/Sonet OC-48/STM-16的光/电接口。文章介绍了2.5 Gb/s optical transponder的功能、结构等技术和相应的设计方案。

A 58-dBΩ20-Gb/s inverter-based cascode transimpedance amplifier for optical communications

This work presents a high-gain broadband inverter-based cascode transimpedance amplifier fabricated in a 65-nm CMOS process.Multiple bandwidth enhancement techniques,including input bonding wire,input series on-chip inductive peak-ing and negative capacitance compensation,are adopted to overcome the large off-chip photodiode capacitive loading and the miller capacitance of the input device,achieving an overall bandwidth enhancement ratio of 8.5.The electrical measure-ment shows TIA achieves 58 dBΩup to 12.7 GHz with a 180-fF off-chip photodetector.The optical measurement demonstrates a clear open eye of 20 Gb/s.The TIA dissipates 4 mW from a 1.2-V supply voltage.

Optimizing Optical Attocells Positioning of Indoor Visible Light Communication System

Visible light communication(VLC),which is a prominent emerging solution that complements the radio frequency(RF)technology,exhibits the potential to meet the demands of fifth-generation(5G)and beyond technologies.The random movement of mobile terminals in the indoor environment is a challenge in the VLC system.The model of optical attocells has a critical role in the uniform distribution and the quality of communication links in terms of received power and signal-to-noise ratio(SNR).As such,the optical attocells positions were optimized in this study with a developed try and error(TE)algorithm.The optimized optical attocells were examined and compared with previous models.This novel approach had successfully increased minimum received power from−1.29 to−0.225 dBm,along with enhanced SNR performance by 2.06 dB.The bit error rate(BER)was reduced to 4.42×10−8 and 6.63×10−14 by utilizing OOK-NRZ and BPSK modulation techniques,respectively.The optimized attocells positions displayed better uniform distribution,as both received power and SNR performances improved by 0.45 and 0.026,respectively.As the results of the proposed model are optimal,it is suitable for standard office and room model applications.

Equivalent Noise Models in Fiber Optical Communication Systems

An equivalent noise model of optical receiver amplifiers as shown in Fig.1 has been given in many fiber optical communication literatures. It is proved in this paper that this equivalent noise model is neither equivalent to the original one nor measurable. The main reason is that the position of the input impedance in this noise model is not the same with its in the typical noise model,but the same S vn , S in with the typical noise model are used. So the equivalent noise model above is wrong and is not fit to be taken into application.

Performance Analysis of Optical Wireless Communication System Employing Neuro-Fuzzy Based Spot-Diffusing Techniques

The spot-diffusing technique provides better performance compared to conventional diffuse system for indoor optical-wireless communication (OWC) system. In this paper, the performance of an OW spot-diffusing communication system using Neuro-Fuzzy (NF) adaptive multi-beam transmitter configuration has been proposed. The multi-beam transmitter generates multiple spots pointed in different directions, hence, forming a matrix of diffusing spots based on position of the receiver and receiver mobility. Regardless of the position of the transmitter and receiver, NF controller target the spots adaptively at the best locations and allocates optimal power to the spots and beam angle are adapted in order to achieve better signal-to-noise plus interference ratio (SNIR). Maximum ratio combining (MRC) is used in the imaging receiver. The proposed OW spot-diffusing communication system is compared with other spot-beam diffusion methods proposed in literature. Performance evaluation revels that the proposed NF based OW spot-diffusing communication system outperforms other spot-beam diffusion methods.

A 12 Gbit/s limiting amplifier using 2 GaAs HBT technology for fiber-optic transmission system

A 12 Gbit/s limiting amplifier for fiber-optic transmission system is realized in a 2μm GaAs HBT technology. The whole circuit consists of an input buffer, three similar amplifier cells, an output buffer for driving 50 ft transmission lines and a pair of feedback networks for offset cancellation. At a positive supply voltage of 2 V and a negative supply voltage of - 2V, the power dissipation is about 280 mW. The small-signal gain is higher than 46 dB and the input dynamic range is about 40 dB with a constant single-ended output voltage swing of 400 mV. Satisfactory eye-diagrams are obtained at the bit rate of 12 Gbit/s limited by the test set-up. The chip area is 1.15 mm ×0.7 mm.

4 × 20 GHz silica-based AWG hybrid integrated receiver optical sub-assemblies

Both the 4 × 20 GHz coarse wavelength division multiplexing and LAN-WDM receiver optical sub-assemblies（ROSAs） were developed. The ROSA package was hybrid integrated with a planar lightwave circuit arrayed waveguide grating（AWG） with 2% refractive index difference and a four-channel top-illuminated positive-intrinsicnegative photodetector（PD） array. The output waveguides of the AWG were designed in a multimode structure to provide flat-top optical spectra, and their end facet was angle-polished to form a total internal reflection interface to realize vertical coupling with a PD array. The maximum responsivity of ROSA was about 0.4 A/W, and its 3 dB bandwidth of frequency response was up to 20 GHz for each transmission lane. The hybrid integrated ROSA would be a cost-effective and easy-assembling solution for 100 Gb E data center interconnections.

A 40 Gbit/s fully integrated optical receiver analog front-end in 90 nm CMOS

A fully integrated 40 Gbit/s optical receiver analog front-end （AFE） including a transimpedance amplifier （TIA） and a limiting amplifier （LA） for short distance communication is described in this paper. The proposed TIA employs a modified regulated cascode （RGC） configuration as input stage, and adopts a third order interleaving active feedback gain stage. The LA utilizes nested active feedback, negative capacitance, and inductor peaking technology to achieve high voltage gain and wide bandwidth. The tiny photo current received by the receiver AFE is amplified to a single-ended voltage swing of 200 mV（p-p）. Simulation results show that the receiver AFE provides conversion gain of up to 83 dBΩ and bandwidth of 34.7 GHz, and the equivalent input noise current integrated from 1 MHz to 30 GHz is about 6.6 μA（rms）.

Effects of critical geometric parameters on the optical performance of a conical cavity receiver

The optical performance of a receiver has a great influence on the efficiency and stability of a solar thermal power system.Most of the literature focuses on the optical performance of receivers with different geometric shapes,but less research is conducted on the effects of critical geometric parameters.In this paper,the commercial software TracePro was used to investigate the effects of some factors on a conical cavity receiver,such as the conical angle,the number of loops of the helical tube,and the distance between the focal point of the collector and the aperture.These factors affect the optical efficiency,the maximum heat flux density,and the light distribution in the conical cavity.The optical performance of the conical receiver was studied and analyzed using the Monte Carlo ray tracing method.To make a reliable simulation,the helical tube was attached to the inner wall of the cavity in the proposed model.The results showed that the amount of light rays reaching the helical tube increases with the increasing of the conical angle,while the optical efficiency decreases and the maximum heat flux density increases.The increase in the number of loops contributed to an increase in the optical efficiency and a uniform light distribution.The conical cavity receiver had an optimal optical performance when the focal point of the collector was near the aperture.

VCO clock synchronization loop combined with dispersion equalization in optical coherent receivers

In optical coherent receivers,the timing error detector （TED） in synchronization loop can not work normally when signal is distorted by large dispersion.This paper proposes a novel clock synchronization scheme which adds a butterfly-structured adaptive equalizer to the loop to fulfill synchronizations,equalizations and polarization de-multiplexing of two polarization states simultaneously under the control of single voltage-controlled oscillator （VCO）.Simulink simulation demonstrates the rationality and the feasibility of the combined loop with single VCO.