Real-time detection for object size has now become a hot topic in the testing field and image processing is the core algorithm. This paper focuses on the processing and display of the collected dynamic images to achie...Real-time detection for object size has now become a hot topic in the testing field and image processing is the core algorithm. This paper focuses on the processing and display of the collected dynamic images to achieve a real-time image pro- cessing for the moving objects. Firstly, the median filtering, gain calibration, image segmentation, image binarization, cor- ner detection and edge fitting are employed to process the images of the moving objects to make the image close to the real object. Then, the processed images are simultaneously displayed on a real-time basis to make it easier to analyze, understand and identify them, and thus it reduces the computation complexity. Finally, human-computer interaction （HCI）-friendly in- terface based on VC ＋＋ is designed to accomplish the digital logic transform, image processing and real-time display of the objects. The experiment shows that the proposed algorithm and software design have better real-time performance and accu- racy which can meet the industrial needs.展开更多
This paper describes a fast digital calibration scheme for pipelined analog-to-digital converters（ADCs）. The proposed method corrects the nonlinearity caused by finite opamp gain and capacitor mismatch in multiplyin...This paper describes a fast digital calibration scheme for pipelined analog-to-digital converters（ADCs）. The proposed method corrects the nonlinearity caused by finite opamp gain and capacitor mismatch in multiplying digital-to-analog converters（MDACs）.The considered calibration technique takes the advantages of both foreground and background calibration schemes.In this combination calibration algorithm,a novel parallel background calibration with signal-shifted correlation is proposed,and its calibration cycle is very short.The details of this technique are described in the example of a 14-bit 100 Msample/s pipelined ADC.The high convergence speed of this background calibration is achieved by three means.First,a modified 1.5-bit stage is proposed in order to allow the injection of a large pseudo-random dithering without missing code.Second,before correlating the signal,it is shifted according to the input signal so that the correlation error converges quickly.Finally,the front pipeline stages are calibrated simultaneously rather than stage by stage to reduce the calibration tracking constants.Simulation results confirm that the combination calibration has a fast startup process and a short background calibration cycle of 2×2^（21） conversions.展开更多
基金National Natural Science Foundation of China(No.61302159,61227003,61301259)Natual Science Foundation of Shanxi Province(No.2012021011-2)+2 种基金Specialized Research Fund for the Doctoral Program of Higher Education,China(No.20121420110006)Top Science and Technology Innovation Teams of Higher Learning Institutions of Shanxi Province,ChinaProject Sponsored by Scientific Research for the Returned Overseas Chinese Scholars,Shanxi Province(No.2013-083)
文摘Real-time detection for object size has now become a hot topic in the testing field and image processing is the core algorithm. This paper focuses on the processing and display of the collected dynamic images to achieve a real-time image pro- cessing for the moving objects. Firstly, the median filtering, gain calibration, image segmentation, image binarization, cor- ner detection and edge fitting are employed to process the images of the moving objects to make the image close to the real object. Then, the processed images are simultaneously displayed on a real-time basis to make it easier to analyze, understand and identify them, and thus it reduces the computation complexity. Finally, human-computer interaction （HCI）-friendly in- terface based on VC ＋＋ is designed to accomplish the digital logic transform, image processing and real-time display of the objects. The experiment shows that the proposed algorithm and software design have better real-time performance and accu- racy which can meet the industrial needs.
基金supported by the National Key Project,China(No.2008zx010200001)
文摘This paper describes a fast digital calibration scheme for pipelined analog-to-digital converters（ADCs）. The proposed method corrects the nonlinearity caused by finite opamp gain and capacitor mismatch in multiplying digital-to-analog converters（MDACs）.The considered calibration technique takes the advantages of both foreground and background calibration schemes.In this combination calibration algorithm,a novel parallel background calibration with signal-shifted correlation is proposed,and its calibration cycle is very short.The details of this technique are described in the example of a 14-bit 100 Msample/s pipelined ADC.The high convergence speed of this background calibration is achieved by three means.First,a modified 1.5-bit stage is proposed in order to allow the injection of a large pseudo-random dithering without missing code.Second,before correlating the signal,it is shifted according to the input signal so that the correlation error converges quickly.Finally,the front pipeline stages are calibrated simultaneously rather than stage by stage to reduce the calibration tracking constants.Simulation results confirm that the combination calibration has a fast startup process and a short background calibration cycle of 2×2^（21） conversions.
