High performance carrier stored trench bipolar transistor with dual shielding structure

We propose a novel high performance carrier stored trench bipolar transistor(CSTBT)with dual shielding structure(DSS-CSTBT).The proposed DSS-CSTBT features a double trench structure with different trench profiles in the surface,in which a shallow gate trench is shielded by a deep emitter trench and a thick oxide layer under it.Compared with the conventional CSTBT(con-CSTBT),the proposed DSS-CSTBT not only alleviates the negative impact of the shallow gate trench and highly doped CS layer on the breakdown voltage(BV),but also well reduces the gate-collector capacitance CGC,gate charge Q_(G),and turn-off loss E_(OFF)of the device.Furthermore,lower turn-on loss E_(ON)and gate drive loss E_(DR)are also obtained.Simulation results show that with the same CS layer doping concentration N_(CS)=1.5×10^(16)cm^(-3),the BV increases from 1312 V of the con-CSTBT to 1423 V of the proposed DSS-CSTBT with oxide layer thickness under gate(T_(og2))of 1μm.Moreover,compared with the con-CSTBT,the C_(GC)at V_(CE)of 25 V and miller plateau charge(Q_(GC))for the proposed DSS-CSTBT with T_(og2)of 1μm are reduced by 79.4%and 74.3%,respectively.With the VGEincreases from 0 V to 15 V,the total QGfor the proposed DSS-CSTBT with T_(og2)of 1μm is reduced by 49.5%.As a result,at the same on-state voltage drop(V_(CEON))of 1.55 V,the E_(ON)and E_(OFF)are reduced from 20.3 mJ/cm^(2)and 19.3 mJ/cm^(2)for the con-CSTBT to8.2 mJ/cm^(2)and 9.7 mJ/cm^(2)for the proposed DSS-CSTBT with T_(og2)of 1μm,respectively.The proposed DSS-CSTBT not only significantly improves the trade-off relationship between the V_(CEON)and E_(OFF)but also greatly reduces the E_(ON).

A novel high-voltage light punch-through carrier stored trench bipolar transistor with buried p-layer

A novel high-voltage light punch-through（LPT） carrier stored trench bipolar transistor（CSTBT） with buried p-layer（BP） is proposed in this paper.Since the negative charges in the BP layer modulate the bulk electric field distribution,the electric field peaks both at the junction of the p base/n-type carrier stored（N-CS） layer and the corners of the trench gates are reduced,and new electric field peaks appear at the junction of the BP layer/N drift region.As a result,the overall electric field in the N drift region is enhanced and the proposed structure improves the breakdown voltage（BV） significantly compared with the LPT CSTBT.Furthermore,the proposed structure breaks the limitation of the doping concentration of the N-CS layer（NN CS） to the BV,and hence a higher NN CS can be used for the proposed LPT BP-CSTBT structure and a lower on-state voltage drop（Vce（sat）） can be obtained with almost constant BV.The results show that with a BP layer doping concentration of NBP = 7 × 10^15 cm^-3,a thickness of LBP = 2.5 μm,and a width of WBP = 5 μm,the BV of the proposed LPT BP-CSTBT increases from 1859 V to 1862 V,with NN CS increasing from 5 × 10^15 cm^-3 to 2.5 × 10^16 cm^-3.However,with the same N-drift region thickness of 150 μm and NN CS,the BV of the CSTBT decreases from 1598 V to 247 V.Meanwhile,the Vce（sat） of the proposed LPT BP-CSTBT structure decreases from 1.78 V to 1.45 V with NN CS increasing from 5 × 10^15 cm^-3 to 2.5 × 10^16 cm^-3.