As technology shrinks in modern era the demand on high speed, low power consumption and small chip area in microprocessors is come into existence. In this paper we have presented a new class of domino circuit design f...As technology shrinks in modern era the demand on high speed, low power consumption and small chip area in microprocessors is come into existence. In this paper we have presented a new class of domino circuit design for low power consumption, faster circuit speed and high performance. Due to wide fan-in domino logic, its logic gate suffer from noise sensitivity, if we improve sensitivity, sub-threshold and gate oxide leakage current dominate in evaluation network, which increases the power consumption and reduces the performance of the circuit. The proposed circuit improves the dynamic power consumption and reduces the delay which improves the speed of the circuit. Simulation is performed in BISM4 Cadence environment at 65 nm process technology, with supply voltage 1 V at 100 MHz frequency and bottleneck operating temperature of 27°C with CL = 1 fF. From the result average power improvement by proposed circuit 1 & 2 for 8 input OR gate is 10.1%, 15.28% SFLD, 48.56%, 51.49% CKD, 55.17%, 57.71% HSD and improvement of delay is 1.10%, 12.76% SFLD, 19.13%, 28.63% CKD, 4.32%, 15.59% HSD, 19.138%, 44.25% DFD respectively.展开更多
Considering mechanical limitation or device restriction in practical application, this paper investigates impulsive stabilization of nonlinear systems with impulsive gain error. Compared with the existing impulsive an...Considering mechanical limitation or device restriction in practical application, this paper investigates impulsive stabilization of nonlinear systems with impulsive gain error. Compared with the existing impulsive analytical approaches,the proposed impulsive control method is more practically applicable, which includes control gain error with an acceptable boundary. A sufficient criterion for global exponential stability of an impulsive control system is derived, which relaxes the condition for precise impulsive gain efficiently. The effectiveness of the proposed method is confirmed by theoretical analysis and numerical simulation based on Chua＇s circuit.展开更多
文中提出一种非隔离型软开关高增益准Z源DC-DC变换器。变换器具有输入电流连续、输入与输出供地、高电压增益以及开关器件应力小等优点。同时,变换器中所有开关管都工作在零电压开关(zero voltage switching,ZVS)条件下,所有二极管都工...文中提出一种非隔离型软开关高增益准Z源DC-DC变换器。变换器具有输入电流连续、输入与输出供地、高电压增益以及开关器件应力小等优点。同时,变换器中所有开关管都工作在零电压开关(zero voltage switching,ZVS)条件下,所有二极管都工作在零电压零电流开关(zero-voltage zero-current switching,ZVZCS)条件下,可以减小开关管的开关损耗以及二极管的反向恢复损耗。通过引入三耦合绕组提高变换器电压增益,同时,有源钳位电路的加入减小了开关管两端的电压尖峰。较小感值的耦合电感相应的铜损小、体积小,进而提高了变换器的效率和功率密度。深入分析变换器的工作模态,推导变换器的电压增益以及元器件的电压、电流应力,进行稳态分析和参数设计。最后,搭建一台100 kHz、200 W、38~380 V的实验样机,变换器在额定功率的效率为96.13%,实验结果与理论分析相吻合,证明所提变换器的可行性。展开更多
文摘As technology shrinks in modern era the demand on high speed, low power consumption and small chip area in microprocessors is come into existence. In this paper we have presented a new class of domino circuit design for low power consumption, faster circuit speed and high performance. Due to wide fan-in domino logic, its logic gate suffer from noise sensitivity, if we improve sensitivity, sub-threshold and gate oxide leakage current dominate in evaluation network, which increases the power consumption and reduces the performance of the circuit. The proposed circuit improves the dynamic power consumption and reduces the delay which improves the speed of the circuit. Simulation is performed in BISM4 Cadence environment at 65 nm process technology, with supply voltage 1 V at 100 MHz frequency and bottleneck operating temperature of 27°C with CL = 1 fF. From the result average power improvement by proposed circuit 1 & 2 for 8 input OR gate is 10.1%, 15.28% SFLD, 48.56%, 51.49% CKD, 55.17%, 57.71% HSD and improvement of delay is 1.10%, 12.76% SFLD, 19.13%, 28.63% CKD, 4.32%, 15.59% HSD, 19.138%, 44.25% DFD respectively.
基金Project supported by the Major State Basic Research Development Program of China(Grant No.2012CB215202)the National Natural Science Foundation of China(Grant Nos.61104080 and 61134001)the Fundamental Research Funds for the Central Universities(Grant No.CDJZR13 175501)
文摘Considering mechanical limitation or device restriction in practical application, this paper investigates impulsive stabilization of nonlinear systems with impulsive gain error. Compared with the existing impulsive analytical approaches,the proposed impulsive control method is more practically applicable, which includes control gain error with an acceptable boundary. A sufficient criterion for global exponential stability of an impulsive control system is derived, which relaxes the condition for precise impulsive gain efficiently. The effectiveness of the proposed method is confirmed by theoretical analysis and numerical simulation based on Chua＇s circuit.
