In this paper, we present an improved high-frequency equivalent circuit for SiGe heterojunction bipolar transistors（HBTs） with a CBE layout, where we consider the distributed effects along the base region. The actua...In this paper, we present an improved high-frequency equivalent circuit for SiGe heterojunction bipolar transistors（HBTs） with a CBE layout, where we consider the distributed effects along the base region. The actual device structure is divided into three parts： a link base region under a spacer oxide, an intrinsic transistor region under the emitter window,and an extrinsic base region. Each region is considered as a two-port network, and is composed of a distributed resistance and capacitance. We solve the admittance parameters by solving the transmission-line equation. Then, we obtain the smallsignal equivalent circuit depending on the reasonable approximations. Unlike previous compact models, in our proposed model, we introduce an additional internal base node, and the intrinsic base resistance is shifted into this internal base node,which can theoretically explain the anomalous change in the intrinsic bias-dependent collector resistance in the conventional compact model.展开更多
为助力我国集成电路材料产业的科技决策,对集成电路材料产业链各环节进行中美日技术布局差异分析与揭示。基于论文、专利数据,采用文献计量分析方法开展技术布局差异分析研究。具体地,通过梳理集成电路材料产业链,明确产业链各环节的7...为助力我国集成电路材料产业的科技决策,对集成电路材料产业链各环节进行中美日技术布局差异分析与揭示。基于论文、专利数据,采用文献计量分析方法开展技术布局差异分析研究。具体地,通过梳理集成电路材料产业链,明确产业链各环节的7种材料,分别从Web of Science和IncoPat数据库获取全球论文和专利数据,结合论文质量和专利价值判断标准,分析中美日三国的论文发表与专利申请趋势差异、机构数量差异、企业数量差异和技术差异。研究发现,近年来我国在集成电路材料产业链上的专利和论文情况均取得进步,高价值专利和高被引论文占比持续攀升;但在不同材料上的表现不均衡,在硅晶圆、光刻胶等领域更注重专利申请,而在电子气体、湿电子化学品等领域更注重论文发表;在专利申请机构总量上略有优势,但申请高价值专利的机构不足,呈现出论文数量多、机构少的特点;专利申请的机构中,企业占比较多,且高价值专利主要集中在企业。中美日三国的技术关注点存在差异,美日有部分共同关注点。展开更多
This paper presents the design and the experimental measurements of two complementary metal-oxide-semiconductor (CMOS) LC-tuned voltage controlled oscillators (VCO) implemented in a 0.18 μm 6-metal-layer mixed-signal...This paper presents the design and the experimental measurements of two complementary metal-oxide-semiconductor (CMOS) LC-tuned voltage controlled oscillators (VCO) implemented in a 0.18 μm 6-metal-layer mixed-signal/RF CMOS technology. The design methodologies and approaches for the optimization of the ICs are presented. The first design is optimized for mixed-signal transistor, oscillated at 2.64 GHz with a phase noise of -93.5 dBc/Hz at 500 kHz offset. The second one optimized for RF transistor, using the same architecture, oscillated at 2.61 GHz with a phase noise of -95.8 dBc/Hz at 500 kHz offset. Under a 2 V supply, the power dissipation is 8 mW, and the maximum buffered output power for mixed-signal and RF transistor are -7 dBm and -5.4 dBm, respectively. Both kinds of oscillators make use of on-chip components only, allowing for simple and robust integration.展开更多
基金Project supported by the National Natural Science Funds of China(Grant Nos.61574056 and 61504156)the Natural Science Foundation of Shanghai,China(Grant No.14ZR1412000)+1 种基金Shanghai Sailing Program,China(Grant No.17YF1404700)the Science and Technology Commission of Shanghai Municipality,China(Grant No.14DZ2260800)
文摘In this paper, we present an improved high-frequency equivalent circuit for SiGe heterojunction bipolar transistors（HBTs） with a CBE layout, where we consider the distributed effects along the base region. The actual device structure is divided into three parts： a link base region under a spacer oxide, an intrinsic transistor region under the emitter window,and an extrinsic base region. Each region is considered as a two-port network, and is composed of a distributed resistance and capacitance. We solve the admittance parameters by solving the transmission-line equation. Then, we obtain the smallsignal equivalent circuit depending on the reasonable approximations. Unlike previous compact models, in our proposed model, we introduce an additional internal base node, and the intrinsic base resistance is shifted into this internal base node,which can theoretically explain the anomalous change in the intrinsic bias-dependent collector resistance in the conventional compact model.
文摘为助力我国集成电路材料产业的科技决策,对集成电路材料产业链各环节进行中美日技术布局差异分析与揭示。基于论文、专利数据,采用文献计量分析方法开展技术布局差异分析研究。具体地,通过梳理集成电路材料产业链,明确产业链各环节的7种材料,分别从Web of Science和IncoPat数据库获取全球论文和专利数据,结合论文质量和专利价值判断标准,分析中美日三国的论文发表与专利申请趋势差异、机构数量差异、企业数量差异和技术差异。研究发现,近年来我国在集成电路材料产业链上的专利和论文情况均取得进步,高价值专利和高被引论文占比持续攀升;但在不同材料上的表现不均衡,在硅晶圆、光刻胶等领域更注重专利申请,而在电子气体、湿电子化学品等领域更注重论文发表;在专利申请机构总量上略有优势,但申请高价值专利的机构不足,呈现出论文数量多、机构少的特点;专利申请的机构中,企业占比较多,且高价值专利主要集中在企业。中美日三国的技术关注点存在差异,美日有部分共同关注点。
基金TheNationalHighTechnologyResearchandDevelopmentProgramofChina (863Program ) (No .2 0 0 2AA1Z160 0 )
文摘This paper presents the design and the experimental measurements of two complementary metal-oxide-semiconductor (CMOS) LC-tuned voltage controlled oscillators (VCO) implemented in a 0.18 μm 6-metal-layer mixed-signal/RF CMOS technology. The design methodologies and approaches for the optimization of the ICs are presented. The first design is optimized for mixed-signal transistor, oscillated at 2.64 GHz with a phase noise of -93.5 dBc/Hz at 500 kHz offset. The second one optimized for RF transistor, using the same architecture, oscillated at 2.61 GHz with a phase noise of -95.8 dBc/Hz at 500 kHz offset. Under a 2 V supply, the power dissipation is 8 mW, and the maximum buffered output power for mixed-signal and RF transistor are -7 dBm and -5.4 dBm, respectively. Both kinds of oscillators make use of on-chip components only, allowing for simple and robust integration.
