Design of CMOS class-E power amplifier for low power applications

A fully integrated class-E power amplifier（PA） at 2.4 GHz implemented in a 0. 18 μm 6-metal-layer mixed/RF CMOS （ complementary metal-oxide-semiconductor transistor ） technology is presented. A two-stage amplification structure is chosen for this PA. The driving stage produces a high swing switch signal by using resonation technology. The output stage is designed as a class-E topology to realize the power amplification. Under a 1.2 V power supply, the PA delivers a maximum output power of 8. 8 dBm with a power-added efficiency （PAE） of 44%. A new power control method for the class-E power amplifier is described. By changing the amplitude and duty cycle of the signal which enters the class-E switch transistor, the output power can be covered from - 3 to 8. 8 dBm through a three-bit control word. The proposed PA can be used in low power applications, such as wireless sensor networks and biotelemetry systems.

Broadband Dual-Input Doherty Power Amplifier Design Based on a Simple Adaptive Power Dividing Ratio Function

In this paper,a simple adaptive power dividing function for the design of a dual-input Doherty power amplifier(DPA)is presented.In the presented approaches,the signal separation function(SSF)at different frequency points can be characterized by a polynomial.And in the practical test,the coefficients of SSF can be determined by measuring a small number of data points of input power.Same as other dualinput DPAs,the proposed approach can also achieve high output power and back-off efficiency in a broadband operation band by adjusting the power distribution ratio flexibly.Finally,a 1.5-2.5 GHz highefficiency dual-input Doherty power amplifier is implemented according to this approach.The test results show that the peak power is 48.6-49.7d Bm,and the 6-d B back-off efficiency is 51.0-67.0%,and the saturation efficiency is 52.4-74.6%.The digital predistortion correction is carried out at the frequency points of 1.8/2.1GHz,and the adjacent channel power ratio is lower than-54.5d Bc.Simulation and experiment results can verify the effectiveness and correctness of the proposed method.

A Hybrid Integrated and Low-Cost Multi-Chip Broadband Doherty Power Amplifier Module for 5G Massive MIMO Application

In this paper,a hybrid integrated broadband Doherty power amplifier(DPA)based on a multi-chip module(MCM),whose active devices are fabricated using the gallium nitride(GaN)process and whose passive circuits are fabricated using the gallium arsenide(GaAs)integrated passive device(IPD)process,is proposed for 5G massive multiple-input multiple-output(MIMO)application.An inverted DPA structure with a low-Q output network is proposed to achieve better bandwidth performance,and a single-driver architecture is adopted for a chip with high gain and small area.The proposed DPA has a bandwidth of 4.4-5.0 GHz that can achieve a saturation of more than 45.0 dBm.The gain compression from 37 dBm to saturation power is less than 4 dB,and the average power-added efficiency(PAE)is 36.3%with an 8.5 dB peak-to-average power ratio(PAPR)in 4.5-5.0 GHz.The measured adjacent channel power ratio(ACPR)is better than50 dBc after digital predistortion(DPD),exhibiting satisfactory linearity.

Channel estimation in integrated radar and communication systems with power amplifier distortion

To reduce the negative impact of the power amplifier(PA)nonlinear distortion caused by the orthogonal frequency division multiplexing(OFDM)waveform with high peak-to-average power ratio(PAPR)in integrated radar and communication(RadCom)systems is studied,the channel estimation in passive sensing scenarios.Adaptive channel estimation methods are proposed based on different pilot patterns,considering nonlinear distortion and channel sparsity.The proposed methods achieve sparse channel results by manipulating the least squares(LS)frequency-domain channel estimation results to preserve the most significant taps.The decision-aided method is used to optimize the sparse channel results to reduce the effect of nonlinear distortion.Numerical results show that the channel estimation performance of the proposed methods is better than that of the conventional methods under different pilot patterns.In addition,the bit error rate performance in communication and passive radar detection performance show that the proposed methods have good comprehensive performance.

A 1.8 GHz Power Amplifier Class-E with Good Average Power Added Efficiency

This paper presents a 1.8 GHz class-E controlled power amplifier (PA). The proposed power amplifier is designed with two-stage architecture. The main advantage of the proposed technique for output control power is a high 37 dB output power dynamic range with good average power adding efficiency. The measurement results show that the PA achieves a high power gain of 23 dBm and power added efficiency (PAE) by 38%. The circuit was post layout simulated in a standard 0.18 μm CMOS technology.

5G Wideband Bandpass Filtering Power Amplifiers Based on a Bandwidth-Extended Bandpass Matching Network

In this paper,a 5G wideband power amplifier(PA)with bandpass filtering response is synthesized using a bandwidth-extended bandpass filter as the matching network(MN).In this structure,the bandwidth(θ_(C))is defined as a variable in the closedform equations provided by the microstrip bandpass filter.It can be extended over a wide range only by changing the characteristic impedances of the structure.Different from the other wideband MNs,the extension of bandwidth does not increase the complexity of the structure(order n is fixed).In addition,based on the bandwidth-extended structure,the wideband design of bandpass filtering PA is not limited to the fixed bandwidth of the specific filter structure.The theoretical analysis of the MN and the design flow of the PA are provided in this design.The fabricated bandpass filtering PA can support almost one-octave bandwidth(2-3.8 GHz),covering the two 5G bands(n41 and n78).The drain efficiency of 47%-60%and output power higher than 40 dBm are measured.Good frequency selectivity in S-parameter measurements can be observed.

Highly efficient class-F power amplifier with digital predistortion for WCDMA applications

A digital predistorted class-F power amplifier （PA） using Cree GaN HEMT CGH40010 operating at 2. 12 GHz is presented to obtain high efficiency and excellent linearity for wideband code-division multiple access （ WCDMA ） applications. Measurement results with the continuous wave （CW） signals indicate that the designed class-F PA achieves a peak power-added efficiency （PAE） of 75. 2% with an output power of 39.4 dBm. The adjacent channel power ratio （ACPR） of the designed PA after digital predistortion （DPD） decreases from -28. 3 and -27. 5 dBc to -51.9 and -54. 0 dBc, respectively, for a 4-carrier 20 MHz WCDMA signal with 7. 1 dB peak to average power ratio （PAPR）. The drain efficiency （DE） of the PA is 37. 8% at an average output power of 33. 3 dBm. The designed power amplifier can be aoolied in the WCDMA system.

Research Towards Terahertz Power Amplifiers in Silicon-Based Process

In view of the existing design challenges for Terahertz(THz)power amplifiers(PAs),the common design methods and the efforts of the State Key Laboratory of Millimeter Wave,Southeast University,China in the development of silicon-based THz PAs,mainly including silicon-based PAs with operating frequencies covering 100–300 GHz,are summarized in this paper.Particularly,we design an LC-balun-based two-stage differential cascode PA with a center frequency of 150 GHz and an output power of 14 dBm.Based on a Marchand balun,we report a 220 GHz three-stage differential cascode PA with a saturated output power of 9.5 dBm.To further increase the output power of THz PA,based on a four-way differential power combining technique,we report a 211–263 GHz dual-LC-tank-based broadband PA with a recorded 14.7 dBm Psat and 16.4 dB peak gain.All the above circuits are designed in a standard 130 nm silicon germanium(SiGe)BiCMOS process.

Analysis of the third harmonic for class-F power amplifiers with an Ⅰ–Ⅴ knee effect

The appearance of third-generation semiconductors represented by gallium nitride （GaN） material greatly improves the output power of a power amplifier （PA）, but the efficiency of the PA needs to be further improved. The Class-F PA reduces the overlap of drain voltage and current by tuning harmonic impedance so that high efficiency is achieved. This paper begins with the principle of class-F PA, regards the third harmonic voltage as an independent variable, analyzes the influence of the third harmonic on fundamental, and points out how drain efficiency and output power vary with the third harmonic voltage with an I-V knee effect. Finally, the best third harmonic impedance is found mathematically. We compare our results with the Loadpull technique in advanced design system environment and conclude that an optimized third harmonic impedance is open in an ideal case, while it is not at an open point with the I-V knee effect, and the drain efficiency with optimized third harmonic impedance is 4% higher than that with the third harmonic open.

Using LDMOS Transistor in Class-F Power Amplifier For WCDMA Applications

The fundamental operating principle of a Class F power amplifier and the factors aiding or affecting Class F performance were explicated previously. A Class F power amplifier design which satisfies WCDMA specifications is explained in this paper. The Class F amplifier was designed by employing Motorola’s LDMOS (Laterally Diffused Metal Oxide Semiconductor) transistor models and we simulated its performance by means of ADS. A variety of procedures were applied in the process of designing Class F amplifier, namely, DC simulation, bias point selection, source-pull and load-pull characterization, input and output matching circuit design and the design of suitable harmonic traps, which are explained here.

X-band inverse class-F GaN internally-matched power amplifier

An X-band inverse class-F power amplifier is realized by a 1-mm Al Ga N/Ga N high electron mobility transistor（HEMT）.The intrinsic and parasitic components inside the transistor,especially output capacitor Cds,influence the harmonic impedance heavily at the X-band,so compensation design is used for meeting the harmonic condition of inverse class-F on the current source plane.Experiment results show that,in the continuous-wave mode,the power amplifier achieves 61.7% power added efficiency（PAE）,which is 16.3% higher than the class-AB power amplifier realized by the same kind of HEMT.To the best of our knowledge,this is the first inverse class-F Ga N internally-matched power amplifier,and the PAE is quite high at the X-band.

Step memory polynomial predistorter for power amplifiers with memory

To reduce the number of digital predistortion coefficients, a step memory polynomial （SMP）predistorter is presented. The number of predistortion coefficients is decreased by adjusting the maximum nonlinear order for different memory orders in the traditional memory polynomial （MP）predistorter. The proposed SNIP predistorter is identified by an offline learning structure on which the coefficients can be extracted directly from the sampled input and output of a PA. Simulation results show that the SMP predistorter is not tied to a particular PA model and is, therefore, robust. The effectiveness of the SMP predistorter is demonstrated by simulations and experiments on an MP model, a parallel Wiener model, a Wiener-Hammerstein model, a sparsedelay memory polynomial model and a real PA which is fabricated based on the Freescale LDMOSFET MRF21030. Compared with the traditional MP predistorter, the SMP predistorter can reduce the number of coefficients by 60%.

AlGaN/GaN HEMTs Power Amplifier MIC with Power Combining at C-Band

A power amplifier MIC with power combining based on AlGaN/GaN HEMTs was fabricated and measured. The amplifier consists of four 10 × 120μm transistors. A Wilkinson splitters and combining were used to divide and combine the power. By biasing the amplifier at VDS = 40V, IDS = 0.9A, a maximum CW output power of 41.4dBm with a maximum power added efficiency （PAE） of 32.54% and a power combine efficiency of 69% was achieved at 5.4GHz.

A4~12GHz Wideband Balanced MIC Power Amplifier

A 4-12GHz wideband power amplifier,using a balanced configuration with a strip line Lange coupler, is designed and fabricated. This power amplifier shows a maximum continuous wave output power of 29.5dBm at 8GHz center frequency with an associated gain of 8.5dB and a gain flatness of ＋ /- 0.6dB in the 4-12GHz frequency range.

SiGe HBT Class AB Power Amplifier for Wireless Communications

Good performance SiGe power amplifiers applicable to wireless communications are demonstrated.The output power can reach more than 30dBm in class B mode.And in class AB mode,the output power at 1dB compression point ( P 1dB ) is 24dBm,the output third order intercept (TOI) power is 39dBm under V cc of 4V.The highest power added efficiency (PAE) and PAE at 1dB compression point are 34% and 25%,respectively.The adjacent channel power rejection for CDMA signal is more than 42dBc,which complies with IS95 specification.

A monolithic InGaP/GaAs HBT power amplifier for W-CDMA applications

A monolithic microwave integrated circuit （MMIC） power amplifier （PA） is proposed. It adopts a new on-chip bias circuit, which not only avoids the instability of the direct current bias caused by the change in the power supply and temperature, but also compensates deviations caused by the increase in input power. The bias circuit is a current-mirror configuration, and the feedback circuit helps to maintain bias voltage at a constant level. The gain of the feedback circuit is improved by the addition of a non-inverting amplifier within the feedback circuit. A shunt capacitor at the base node of the active bias transistor enhances the linearity of the PA. The chip is fabricated in an InGaP/GaAs heterojunction bipolar transistor （HBT） process. Measured results exhibit a 26. 6-dBm output compression point, 33.6% power-added efficiency （PAE） and - 40.2 dBc adjacent channel power ratio （ACPR） for wide-band code division multiple access （W-CDMA） applications.

A CMOS Power Amplifier with 100% and 18% Modulation Depth for Mobile RFID Readers

Aiming at the specific protocol of RFID technology,a 915MHz CMOS transmitter front-end for OOK modulation is implemented in a 0.18μm CMOS process. The transmitter incorporates a class-E power amplifier （PA）, a modulator, and a control logic unit. The direct-conversion architecture minimizes the required on-and-off-chip components and provides a low-cost and efficient solution. A novel structure is proposed to provide the modulation depth of 100% and 18% ,respectively. The PA presents an output ldB power of 17.6dBm while maintaining a maximum PAE of 35.4%.

A Ka-Band PHEMT MMIC 1W Power Amplifier

The performance of a microwave monolithic integrated circuit .（MMIC） amplifier with high output power in the Ka-band is presented. Using 75mm 0.25μm GaAs PHEMT technology provided by the Hebei Semiconductor Research Institute, this three-stage power amplifier, with a chip size of 19.25mm^2 （3.5mm × 5.5mm）, on 100μm GaAs substrate achieves a linear gain of more than 16dB in the 32.5-35.5GHz frequency range,with an average output power at 1dB gain compression of P1dB = 29. 8dBm and a maximum saturated output power of Psat = 31dBm.

A Monolithic InGaP/GaAs HBT Power Amplifier Design with Improved Gain Flatness

A monolithic power amplifier designed for 3GHz communication applications with improved gain flatness is studied based on InGaP/GaAs hetero-junction bipolar transistor technology in a commercial foundry. To improve gain flatness in a simple way, no external component was used in the real circuit except the decoupled bypass capacitors and RF choke. The measured linear gain is 23dB with gain flatness of ＋_ 0.25dB,satisfying the design goal and matching well with simulation results. This 2-stage power amplifier can deliver 31dBm linear output power and 44% power-added efficiency in the 400MHz bandwidth. The successful design with improved gain flatness is the result of superior distortion compensation and a coil model used as the RF choke.