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An FPGA-Based HOG Accelerator with HW/SW Co-Design for Human Detection and Its Application to Crowd Density Estimation
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作者 Shih-Shinh Huang Shih-Yu Lin Pei-Yung Hsiao 《Journal of Software Engineering and Applications》 2019年第1期1-19,共19页
Human detection is important in many applications and has attracted significant attention over the last decade. The Histograms of Oriented Gradients (HOG) as effective local descriptors are used with binary sliding wi... Human detection is important in many applications and has attracted significant attention over the last decade. The Histograms of Oriented Gradients (HOG) as effective local descriptors are used with binary sliding window mechanism to achieve good detection performance. However, the computation of HOG under such framework is about billion times and the pure software implementation for HOG computation is hard to meet the real-time requirement. This study proposes a hardware architecture called One-HOG accelerator operated on FPGA of Xilinx Spartan-6 LX-150T that provides an efficient way to compute HOG such that an embedded real-time platform of HW/SW co-design for application to crowd estimation and analysis is achieved. The One-HOG accelerator mainly consists of gradient module and histogram module. The gradient module is for computing gradient magnitude and orientation;histogram module is for generating a 36-D HOG feature vector. In addition to hardware realization, a new method called Histograms-of-Oriented-Gradients AdaBoost Long-Feature-Vector (HOG-AdaBoost-LFV) human classifier is proposed to significantly decrease the number of times to compute the HOG without sacrificing detection performance. The experiment results from three static image and four video datasets demonstrate that the proposed SW/HW (software/hardware) co-design system is 13.14 times faster than the pure software computation of Dalal algorithm. 展开更多
关键词 HUMAN DETECTION HOG hw/sw co-design
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基于FPGA的SOPC软硬件协同设计 被引量:3
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作者 汤惟 葛保建 《江汉大学学报(自然科学版)》 2007年第3期49-52,58,共5页
软硬件协同设计作为嵌入式系统开发的重要方法,在克服传统设计方法缺陷的同时,也在系统开发的风险性降低、周期性缩短、稳定性增强等方面表现出优势.文章讨论了软硬件协同设计方法支持的SOPC系统建模、设计、仿真、综合各阶段实施方法,... 软硬件协同设计作为嵌入式系统开发的重要方法,在克服传统设计方法缺陷的同时,也在系统开发的风险性降低、周期性缩短、稳定性增强等方面表现出优势.文章讨论了软硬件协同设计方法支持的SOPC系统建模、设计、仿真、综合各阶段实施方法,以Altera的Quartus II为具体应用开发支持环境,论述了协同设计流程和实施要点,并给出具体应用开发实例. 展开更多
关键词 FPGA 软硬件协同 sopc NIOS IP CORE
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基于NiosⅡ/SoPC的高精度温度传感显示设计 被引量:1
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作者 汤朝霞 李洪群 《常州信息职业技术学院学报》 2010年第3期13-15,共3页
介绍了一种基于嵌入式NiosⅡ软核处理器的SoPC设计方法,实现了精确到万分之一的温度传感显示,本设计采用了软硬件协同设计的方案,实验效果好,实践效果切实可行。
关键词 FPGA/sopc NiosⅡ内核 软硬件协同 温度显示
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