A convenient look-up-table based method for the compensation of non-linear error in digital fringe projection

Although the structured light system that uses digital fringe projection has been widely implemented in three-dimensional surface profile measurement, the measurement system is susceptible to non-linear error. In this work, we propose a convenient look-up-table-based （LUT-based） method to compensate for the non-linear error in captured fringe patterns. Without extra calibration, this LUT-based method completely utilizes the captured fringe pattern by recording the full-field differences. Then, a phase compensation map is established to revise the measured phase. Experimental results demonstrate that this method works effectively.

Compressional Deformation in Indentation Process for Microlens Array Mold

The structure of a microlens array（ MLA） can be formed on copper by an indentation process which is a new manufacture approach we applied here instead of a traditional method to test the material property,thereby work time can be saved. Single-indentation and multi-indentation are both conducted to generate a single dimple and dimples array,namely micro lens and MLA. Based on finite element simulation method,factors affecting the form accuracy,such as springback at the compressed area of one single dimple and compressional deformation at the adjacent area of dimples arrays,are determined,and the results are verified by experiments under the same conditions. Meanwhile,indenter compensation method is proposed to improve form accuracy of single dimple,and the relationship between pitch and compressional deformation is investigated by modelling seven sets of multi-indentations at different pitches to identify the critical pitch for the MLA＇s indentation processing. Loads and cross-sectional profiles are measured and analyzed to reveal the compressional deformation mechanism. Finally,it is found that MLA at pitches higher than 1. 47 times of its diameter can be manufactured precisely by indentation using a compensated indenter.

Curvature Compensated CMOS Bandgap Reference with Novel Process Variation Calibration Technique

A lowtemperature coefficient（ TC） bandgap reference（ BGR） with novel process variation calibration technique is proposed in this paper. This proposed calibration technique compensating both TC and output value of BGR achieves fine adjustment step towards the reference voltage,while keeping optimal TC by utilizing large resistance to help layout match. The high-order curvature compensation realized by poly and p-diffusion resistors is introduced into the design to guarantee the temperature characteristic. Implemented in 180 nm technology,the proposed BGR has been simulated to have a power supply rejection ratio（ PSRR） of 91 dB@100 Hz. The calibration technique covers output voltage scope of 0. 49 V-0. 56 Vwith TC of 9. 45 × 10^（-6）/℃-9. 56 × 10^（-6）/℃ over the temperature range of-40 ℃-120 ℃. The designed BGR provides a reference voltage of 500 mV,with measured TC of 10. 1 × 10^（-6）/℃.

Reliability Measure of a Relay Parallel System under Dependence Conditions

In a relay system of dependent components, the failure to close reliability measure is given as a Girsanov transform of the failure to open reliability measure.

Information-based approach:Pricing of a credit risky asset in the presence of default time

We extend the information-based asset-pricing framework by Brody,Hughston&Macrina to incorporate a stochastic bankruptcy time for the writer of the asset.Our model introduces a non-defaultable cash flow Zr to be made at time T,alongside the time T of a possible bankruptcy of the writer of the asset are in line with the filtration generated by a Brownian random bridge with length v=T^T and pinning point ZT,where is a constant.Quantities Z and T are not necessarily independent.The model does not depend crucially on the interpretation of as a bankruptcy time.We derived the price process of the asset and compute the prices of associated options.The dynamics of the price process satisfy a diffusion equation.Employing the approach of P.-A.Meyer,we provide the explicit computation of the compensator of v.Leveraging special properties of the bridge process,we also provide the explicit expression of the compensator of Zr I(v,+o).The resulting conclusion highlights the totally inaccessible property of the stopping time v.This characteristic is particularly suitable for financial markets where the time of default of a writer cannot be predictable from any other signal in the system until default happens.

A fast-settling frequency-presetting PLL frequency synthesizer with process variation compensation and spur reduction

This paper proposes a fast-settling frequency-presetting PLL frequency synthesizer. A mixedsignal VCO and a digital processor are developed to accurately preset the frequency of VCO and greatly reduce the settling time. An auxiliary tuning loop is introduced in order to reduce reference spur caused by leakage current. The digital processor can automatically compensate presetting frequency variation with process and temperature, and control the operation of the auxiliary tuning loop. A 1.2 GHz integer-N synthesizer with 1 MHz reference input was implemented in a 0.18 μm process. The measured results demonstrate that the typical settling time of the synthesizer is less than 3 μs, and the phase noise is –108 dBc/Hz@1MHz. The reference spur is –52 dBc.

On the compensator of the default process in an information-based model

This paper provides sufficient conditions for the time of bankruptcy(of a company or a state)for being a totally inaccessible stopping time and provides the explicit computation of its compensator in a framework where the flow of market information on the default is modelled explicitly with a Brownian bridge between 0 and 0 on a random time interval.

A wideband RF amplifier for satellite tuners

This paper presents the design and measured performance ofa wideband amplifier for a direct conversion satellite tuner. It is composed of a wideband low noise amplifier （LNA） and a two-stage RF variable gain amplifier （VGA） with linear gain in dB and temperature compensation schemes. To meet the system linearity requirement, an improved distortion compensation technique and a bypass mode are applied on the LNA to deal with the large input signal. Wideband matching is achieved by resistive feedback and an off-chip LC-ladder matching network. A large gain control range （over 80 dB） is achieved by the VGA with process voltage and temperature compensation and dB linearization. In total, the amplifier consumes up to 26 mA current from a 3.3 V power supply. It is fabricated in a 0.35μm SiGe BiCMOS technology and occupies a silicon area of 0.25 mm^2.