C-CORE:Clustering by Code Representation to Prioritize Test Cases in Compiler Testing

Edge devices,due to their limited computational and storage resources,often require the use of compilers for program optimization.Therefore,ensuring the security and reliability of these compilers is of paramount importance in the emerging field of edge AI.One widely used testing method for this purpose is fuzz testing,which detects bugs by inputting random test cases into the target program.However,this process consumes significant time and resources.To improve the efficiency of compiler fuzz testing,it is common practice to utilize test case prioritization techniques.Some researchers use machine learning to predict the code coverage of test cases,aiming to maximize the test capability for the target compiler by increasing the overall predicted coverage of the test cases.Nevertheless,these methods can only forecast the code coverage of the compiler at a specific optimization level,potentially missing many optimization-related bugs.In this paper,we introduce C-CORE(short for Clustering by Code Representation),the first framework to prioritize test cases according to their code representations,which are derived directly from the source codes.This approach avoids being limited to specific compiler states and extends to a broader range of compiler bugs.Specifically,we first train a scaled pre-trained programming language model to capture as many common features as possible from the test cases generated by a fuzzer.Using this pre-trained model,we then train two downstream models:one for predicting the likelihood of triggering a bug and another for identifying code representations associated with bugs.Subsequently,we cluster the test cases according to their code representations and select the highest-scoring test case from each cluster as the high-quality test case.This reduction in redundant testing cases leads to time savings.Comprehensive evaluation results reveal that code representations are better at distinguishing test capabilities,and C-CORE significantly enhances testing efficiency.Across four datasets,C-CORE increases the average of the percentage of faults detected(APFD)value by 0.16 to 0.31 and reduces test time by over 50% in 46% of cases.When compared to the best results from approaches using predicted code coverage,C-CORE improves the APFD value by 1.1% to 12.3% and achieves an overall time-saving of 159.1%.

面向VHDL语言编译器VCompiler93的研制

研制用于 VHDL语言的编译器 ,语法分析采用一便扫描和预测分析的策略 ,提出了适用于处理 VHDL语言中语法冲突、各类重载语法、静态层次确立等语法现象的具体算法 .开发出面向 VHDL93标准的 VHDL语言编译器 VCompiler93,该编译器运行正常 ,表明所采用的解决方案合理 ,算法有效 .

IDL Compiler API Design, Application and Validation Based on XML API

In order to adapt different languages and platforms, the paper discusses how to process and validate IDL symbol table and intermediate code by XML API. It puts emphasis on IDL AP1 extension towards DOM API based on the idea of combining XML with IDL compilers. At last, the IDL compiler designing framework based on XML AP! is given, in which compiler front end can be managed and validated by some XML techniques and tools, IDL API can be validated on the basis of test, so IDL intermediate code is provided with maintainability, portability and generation. IDL compiler can be developed and extended by XML-based API, which realizes versatility and portability of modern compiler.

A High Speed Signal Processing Machine -Its Architecture, Language and Compiler

A systolic array architecture computer (FXCQ) has been designed for signal processing. R can handle floating point data at very high speed. It is composed of 16 processing cells and a cache that are connected linearly and form a ring structure. All processing cells are identical and programmable. Each processing cell has the peak performance of 20 million floating-point operations per second (20MFLOPS). The machine therefore has a peak performance of 320 M FLOPS. It is integrated as an attached processor into a host system through VME bus interface. Programs for FXCQ are written in a high-level language -B language, which is supported by a parallel optimizing compiler. This paper describes the architecture of FXCQ, B language and its compiler.

The Implementation of the ASN.1-C++ Compiler and Its Application in IN

Syntax Notation One (ASN.1) has been widely used in specifications of high level communication protocol. It is also very important for Intelligent Networks Application Protocol(INAP). This paper presents the design and implementation of the ASN.1 C++ compiler. According to the ASN.1 text, this compiler can generate C++ code of functions for encoding and decoding the data types which are defined by ASN.1. These functions are based on the Basic Encoding Rules(BER) of ASN.1. They have been used in the CIN 01 and CIN 02 systems.

Algorithms for Pre-Compiling Programs by Parallel Compilers

The paper addresses the challenge of transmitting a big number offiles stored in a data center(DC),encrypting them by compilers,and sending them through a network at an acceptable time.Face to the big number offiles,only one compiler may not be sufficient to encrypt data in an acceptable time.In this paper,we consider the problem of several compilers and the objective is tofind an algorithm that can give an efficient schedule for the givenfiles to be compiled by the compilers.The main objective of the work is to minimize the gap in the total size of assignedfiles between compilers.This minimization ensures the fair distribution offiles to different compilers.This problem is considered to be a very hard problem.This paper presents two research axes.Thefirst axis is related to architecture.We propose a novel pre-compiler architecture in this context.The second axis is algorithmic development.We develop six algorithms to solve the problem,in this context.These algorithms are based on the dispatching rules method,decomposition method,and an iterative approach.These algorithms give approximate solutions for the studied problem.An experimental result is imple-mented to show the performance of algorithms.Several indicators are used to measure the performance of the proposed algorithms.In addition,five classes are proposed to test the algorithms with a total of 2350 instances.A comparison between the proposed algorithms is presented in different tables discussed to show the performance of each algorithm.The result showed that the best algorithm is the Iterative-mixed Smallest-Longest-Heuristic(ISL)with a percentage equal to 97.7%and an average running time equal to 0.148 s.All other algorithms did not exceed 22%as a percentage.The best algorithm excluding ISL is Iterative-mixed Longest-Smallest Heuristic(ILS)with a percentage equal to 21,4%and an average running time equal to 0.150 s.

Constructing a Simple Verbal Compiler

The paper’s purpose is to design and program the four operation-calculators that receives voice instructions and runs them as either a voice or text phase. The Calculator simulates the work of the Compiler. The paper is a practical example programmed to support that it is possible to construct a verbal Compiler.

AN OBJECT ORIENTED C++ PARALLEL COMPILER SYSTEM

An object-oriented C++ parallel compiler System, called OOCPCS, is developed to facilitate programmers to write sequential programs using C++ or Annotated C++ language for parallel computahon. OOCPCS bases on an integrated object-oriented paradigm and large-grain data flow model, called OOLGDFM, and recognizes automatically parallel objects using parallel compiling techniques. The paper describes the object-oriented parallel model and realization of the System on networks.

Compiler IR-Based Program Encoding Method for Software Defect Prediction

With the continuous expansion of software applications,people’s requirements for software quality are increasing.Software defect prediction is an important technology to improve software quality.It often encodes the software into several features and applies the machine learning method to build defect prediction classifiers,which can estimate the software areas is clean or buggy.However,the current encoding methods are mainly based on the traditional manual features or the AST of source code.Traditional manual features are difficult to reflect the deep semantics of programs,and there is a lot of noise information in AST,which affects the expression of semantic features.To overcome the above deficiencies,we combined with the Convolutional Neural Networks(CNN)and proposed a novel compiler Intermediate Representation(IR)based program encoding method for software defect prediction(CIR-CNN).Specifically,our program encoding method is based on the compiler IR,which can eliminate a large amount of noise information in the syntax structure of the source code and facilitate the acquisition of more accurate semantic information.Secondly,with the help of data flow analysis,a Data Dependency Graph(DDG)is constructed on the compiler IR,which helps to capture the deeper semantic information of the program.Finally,we use the widely used CNN model to build a software defect prediction model,which can increase the adaptive ability of the method.To evaluate the performance of the CIR-CNN,we use seven projects from PROMISE datasets to set up comparative experiments.The experiments results show that,in WPDP,with our CIR-CNN method,the prediction accuracy was improved by 12%for the AST-encoded CNN-based model and by 20.9%for the traditional features-based LR model,respectively.And in CPDP,the AST-encoded DBNbased model was improved by 9.1%and the traditional features-based TCA+model by 19.2%,respectively.

Constructing an AI Compiler for ARM Cortex-M Devices

The diversity of software and hardware forces programmers to spend a great deal of time optimizing their source code,which often requires specific treatment for each platform.The problem becomes critical on embedded devices,where computational and memory resources are strictly constrained.Compilers play an essential role in deploying source code on a target device through the backend.In this work,a novel backend for the Open Neural Network Compiler(ONNC)is proposed,which exploits machine learning to optimize code for the ARM Cortex-M device.The backend requires minimal changes to Open Neural Network Exchange(ONNX)models.Several novel optimization techniques are also incorporated in the backend,such as quantizing the ONNX model’s weight and automatically tuning the dimensions of operators in computations.The performance of the proposed framework is evaluated for two applications:handwritten digit recognition on the Modified National Institute of Standards and Technology(MNIST)dataset and model,and image classification on the Canadian Institute For Advanced Research and 10(CIFAR-10)dataset with the AlexNet-Light model.The system achieves 98.90%and 90.55%accuracy for handwritten digit recognition and image classification,respectively.Furthermore,the proposed architecture is significantly more lightweight than other state-of-theart models in terms of both computation time and generated source code complexity.From the system perspective,this work provides a novel approach to deploying direct computations from the available ONNX models to target devices by optimizing compilers while maintaining high efficiency in accuracy performance.

高性能计算与标准化的完美结合——Intel Compiler 8.0及其配套工具介绍

在x86体系结构的PC里,编译代码质量最好的C++是谁,不是VC++,不是Borland C++,也不是g++,而是InterC++。本文将带你畅游这个高性能编译器的世界。体会一下无需修改程序就可提升20％性能的美妙感觉。

THE DESIGN AND IMPLEMENTATION OF B96 COMPILER AND B96/8096/8098 SOFTWARE EMULATING PLATFORM IDDEE

A new high-level langusge,B96,which is compiling-type and MCS-96 single chip computer series oriented ,has recently been designed and implemented by the authors. This paper discusses its design thought and its implementation. The paper also accounts for the design of B96/8096/8098 IDDEE,a software Integrated Debugging & Developing Environment of Emulation,which is used to debug and develop 8096/8098 assemble language and/or B96 high-level language source program on PC-based emulating platform.

地方志医药知识辑录与整理规范

《地方志医药知识辑录与整理规范》(T/CIATCM 120-2024)系统梳理地方志所包含的医药知识框架与整理方法,为地方志医药知识分类辑录、知识提取、数据规范提供依据,可有效支撑地方志医药知识库建设,促进地方志医药信息发掘与利用。本标准规定了地方志医药知识辑录与整理的要求与方法,包括总体原则、分类辑录与知识整理,适用于1949年及以前地方志文献医药知识的分类辑录与规范整理,适用于地方志医药知识库建设工作。

中国文学史编纂中的“唱对台戏”

中国文学史编纂中的“唱对台戏”,包括多种类型,或发生在晚辈与前辈之间,如五四新文化人之于清民之际的文学史家;或发生在同辈学人之间,如五四时期的学衡派之于新文化人;或发生在域外汉学与本土学术之间,如《哥伦比亚中国文学史》之于通行的中国文学史。“唱对台戏”促进了对中国文学发展历程的深入理解,是中国文学史编纂逐渐趋于完善的必由之路。对其间的种种情形加以考察,有助于深入把握“先入之见”与“客观性”的辩证关系。

公共图书馆“十五五”规划编制思路与建议

作为实现2035年远期目标的关键五年,“十五五”规划对公共图书馆高质量发展具有深远影响。文章梳理“十四五”以来我国社会经济、公共文化服务体系和公共图书馆事业发展情况,应用PEST分析框架全面审视“十五五”时期国内外宏观环境,深入分析图书馆行业发展趋势,在此基础上提出公共图书馆“十五五”规划的编制原则、目标蓝图和路径建议,旨在为公共图书馆科学编制“十五五”规划提供参考,进而在新时期更好地适应社会需求,提升服务效能,促进文化繁荣。

再论琉球官话课本《官话问答便语》的编写年代

琉球官话课本《官话问答便语》的编写年代目前有两种不同的观点,一为濑户口律子、李炜提出的1703年或1705年,一为木津祐子提出的1710年之后、18世纪后半期之前。用明清历史、地理、经济、语言等多学科的相关材料和研究成果,对两文提出的依据进行检视,发现《官话问答便语》赤木本应编写于1749-1750年,天理本应编写于1751年。《官话问答便语》与另一种琉球官话课本《白姓官话》是同时代的作品,它们语法现象的差异反映出清代不同文化阶层官话风格的差异。

基于Cross-熵与TOPSIS的复杂系统失效模式与影响分析

为降低复杂系统失效模式与影响分析(FMEA)中决策人员的主观偏好和不确定因素对分析结果的影响,建立基于Cross-熵和逼近理想解排序法(TOPSIS)的FMEA方法。基于Hp,q转化算子,将区间直觉模糊集转化为直觉模糊集,根据Cross-熵求得失效模式的综合绩效值;以绩效值最大为目标,以失效模式属性权重取值范围为约束条件,建立模糊线性规划模型,求解得到各属性的权重系数。基于可能度理论和关联系数2种排序方法,得到系统各失效模式改进的优先顺序。用某发动机涡轮增压系统FMEA的实例说明所建立方法的有效性。结果表明,该方法有助于避免分析过程中信息的损失,可提高风险优先数的精确度,避免其排序混乱,并始终能关注关键的故障模式。