Fabrication and characteristics of excellent current spreading GaN-based LED by using transparent electrode-insulator-semiconductor structure

GaN-based vertical light-emitting-diodes （V-LEDs） with an improved current injection pattern were fabricated and a novel current injection pattern of LEDs which consists of electrode-insulator-semiconductor （E1S） structure was proposed. The EIS structure was achieved by an insulator layer （20-nm Ta2O5） deposited between the p-GaN and the ITO layer. This kind of EIS structure works through a defect-assisted tunneling mechanism to realize current injection and obtains a uniform current distribution on the chip surface, thus greatly improving the current spreading ability of LEDs. The appearance of this novel current injection pattern of V-LEDs will subvert the impression of the conventional LEDs structure, including simplifying the chip manufacture technology and reducing the chip cost. Under a current density of 2, 5, 10, and 25 A/cm2, the luminous uniformity was better than conventional structure LEDs. The standard deviation of power density distribution in light distribution was 0.028, which was much smaller than that of conventional structure LEDs and illustrated a huge advantage on the current spreading ability of EIS-LEDs.

Investigation of lateral spreading current in the 4H-SiC Schottky barrier diode chip

Lateral current spreading in the 4H-SiC Schottky barrier diode(SBD)chip is investigated.The 4H-SiC SBD chips with the same vertical parameters are simulated and fabricated.The results indicate that there is a fixed spreading resistance at on-state in current spreading region for a specific chip.The linear specific spreading resistance at the on-state is calculated to be 8.6Ω/cm in the fabricated chips.The proportion of the lateral spreading current in total forward current(Psp)is related to anode voltage and the chip area.Psp is increased with the increase in the anode voltage during initial on-state and then tends to a stable value.The stable values of Psp of the two fabricated chips are 32%and 54%.Combined with theoretical analysis,the proportion of the terminal region and scribing trench in a whole chip(Ksp)is also calculated and compared with Psp.The Ksp values of the two fabricated chips are calculated to be 31.94%and 57.75%.The values of Ksp and Psp are close with each other in a specific chip.The calculated Ksp can be used to predict that when the chip area of SiC SBD becomes larger than 0.5 cm2,the value of Psp would be lower than 10%.

Enhanced performances of AlGaInP-based light-emitting diodes with Schottky current blocking layers

A new epitaxial structure of AlGaInP-based light-emitting diode（LED） with a 0.5-μm GaP window layer was fabricated. In addition, indium tin oxide（ITO） and localized Cr deposition beneath the p-pad electrode were used as the current spreading layer and the Schottky current blocking layer（CBL）, respectively. The results indicated that ITO and the Schottky CBL improve the total light extraction efficiency by relieving the current density crowding beneath the p-pad electrode. At the current of 20 mA, the light output power of the novel LED was 40% and 19% higher than those of the traditional LED and the new epitaxial LED without CBL. It was also found that the novel LED with ITO and CBL shows better thermal characteristics.

Efficiency-enhanced AlGaInP light-emitting diodes using transparent plasmonic silver nanowires

Silver nanowire（AgNW） networks have been demonstrated to exhibit superior transparent and conductive performance over that of indium-doped tin oxide（ITO） and have been proposed to replace ITO, which is currently widely used in optoelectronic devices despite the scarcity of indium on Earth. In this paper, the current spreading and enhanced transmittance induced by AgNWs, which are two important factors influencing the light output power, were analyzed. The enhanced transmittance was studied by finite-difference time-domain simulation and verified by cathodoluminescence measurements.The enhancement ratio of the light output power decreased as the Ga P layer thickness increased, with enhancement ratio values of 79%, 52%, and 15% for Ga P layer thicknesses of 0.5 μm, 1 μm, and 8 μm, respectively, when an AgNW network was included in Al Ga In P light-emitting diodes. This was because of the decreased current distribution tunability of the AgNW network with the increase of the Ga P layer thickness. The large enhancement of the light output power was caused by the AgNWs increasing carrier spread out of the electrode and the enhanced transmittance induced by the plasmonic AgNWs. Further decreasing the sheet resistance of AgNW networks could raise their light output power enhancement ratio.

Analysis on the positive dependence of channel length on ESD failure current of a GGNMOS in a 5 V CMOS

Contrary to general understanding, a test result shows that devices with a shorter channel length have a degraded ESD performance in the advanced silicided CMOS process. Such a phenomenon in a gate-grounded NMOSFET （GGNMOS） was investigated, and the current spreading effect was verified as the predominant factor. Due to transmission line pulse （TLP） measurements and Sentaurus technology computer aided design （TCAD） 2-D numerical simulations, parameters such as current gain, on-resistance and power density were discussed in detail.