A novel curvature-compensated CMOS bandgap voltage reference is presented. The reference utilizes two first order temperature compensations generated from the nonlinearity of the finite current gain β of vertical pnp...A novel curvature-compensated CMOS bandgap voltage reference is presented. The reference utilizes two first order temperature compensations generated from the nonlinearity of the finite current gain β of vertical pnp bipolar transistor. The proposed circuit, designed in a standard 0.18 μm CMOS process, achieves a good temperature coefficient of 2.44 ppm/℃ with temperature range from --40℃ to 85 ℃, and about 4 mV supply voltage variation in the range from 1.4 V to 2.4 V. With a 1.8 V supply voltage, the power supply rejection ratio is -56dB at 10MHz.展开更多
A novel topology low-voltage high precision current reference based on subthreshold Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs) is presented. The circuit achieves a temperature-independent reference...A novel topology low-voltage high precision current reference based on subthreshold Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs) is presented. The circuit achieves a temperature-independent reference current by a proper combination current of two first-order temperature-compensation current references, which exploit the temperature characteristics of integrated poly2 resistors and the 1- V transconductance characteristics of MOSFET operating in the subthreshold region. The circuit, designed with the 1 st silicon 0.35 μm standard CMOS logic process technology, exhibits a stable current of about 2.25 μA with much low temperature coefficient of 3 × 10^-4μA/℃ in the temperature range of-40-150 ℃ at 1 V supply voltage, and also achieves a better power supply rejection ratio (PSRR) over a broad frequency. The PSRR is about -78 dB at DC and remains -42 dB at the frequency higher than 10 MHz. The maximal process error is about 6,7% based on the Monte Carlo simulation. So it has good process compatibility.展开更多
To meet the accuracy requirement for the bandgap voltage reference by the increasing data conversion precision of integrated circuits,a high-order curvature-compensated bandgap voltage reference is presented employing...To meet the accuracy requirement for the bandgap voltage reference by the increasing data conversion precision of integrated circuits,a high-order curvature-compensated bandgap voltage reference is presented employing the characteristic of bipolar transistor current gain exponentially changing with temperature variations.In addition,an over-temperature protection circuit with a thermal hysteresis function to prevent thermal oscillation is proposed.Based on the CSMC 0.5μm 20 V BCD process,the designed circuit is implemented;the active die area is 0.17×0.20 mm;. Simulation and testing results show that the temperature coefficient is 13.7 ppm/K with temperature ranging from -40 to 150℃,the power supply rejection ratio is -98.2 dB,the line regulation is 0.3 mV/V,and the power consumption is only 0.38 mW.The proposed bandgap voltage reference has good characteristics such as small area,low power consumption, good temperature stability,high power supply rejection ratio,as well as low line regulation.This circuit can effectively prevent thermal oscillation and is suitable for on-chip voltage reference in high precision analog,digital and mixed systems.展开更多
A novel high-order curvature compensation negative voltage bandgap reference (NBGR) based on a novel multilevel compensation technique is introduced. Employing an exponential curvature compensation (ECC) term with...A novel high-order curvature compensation negative voltage bandgap reference (NBGR) based on a novel multilevel compensation technique is introduced. Employing an exponential curvature compensation (ECC) term with many high order terms in itself, in a lower temperature range (TR) and a multilevel curvature compen- sation (MLCC) term in a higher TR, a flattened and better effect of curvature compensation over the TR of 165℃ (--40 to 125 ℃) is realised. The MLCC circuit adds two convex curves by using two sub-threshold operated NMOS. The proposed NBGR implemented in the Central Semiconductor Manufacturing Corporation (CSMC) 0.5 #m BCD technology demonstrates an accurate voltage of-1.183 V with a temperature coefficient (TC) as low as 2.45 ppm/℃over the TR of 165℃ at a -5.0 V power supply; the line regulation is 3 mV/V from a -5 to -2 V supply voltage. The active area of the presented NBGR is 370×180 μm2.展开更多
文摘A novel curvature-compensated CMOS bandgap voltage reference is presented. The reference utilizes two first order temperature compensations generated from the nonlinearity of the finite current gain β of vertical pnp bipolar transistor. The proposed circuit, designed in a standard 0.18 μm CMOS process, achieves a good temperature coefficient of 2.44 ppm/℃ with temperature range from --40℃ to 85 ℃, and about 4 mV supply voltage variation in the range from 1.4 V to 2.4 V. With a 1.8 V supply voltage, the power supply rejection ratio is -56dB at 10MHz.
文摘A novel topology low-voltage high precision current reference based on subthreshold Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs) is presented. The circuit achieves a temperature-independent reference current by a proper combination current of two first-order temperature-compensation current references, which exploit the temperature characteristics of integrated poly2 resistors and the 1- V transconductance characteristics of MOSFET operating in the subthreshold region. The circuit, designed with the 1 st silicon 0.35 μm standard CMOS logic process technology, exhibits a stable current of about 2.25 μA with much low temperature coefficient of 3 × 10^-4μA/℃ in the temperature range of-40-150 ℃ at 1 V supply voltage, and also achieves a better power supply rejection ratio (PSRR) over a broad frequency. The PSRR is about -78 dB at DC and remains -42 dB at the frequency higher than 10 MHz. The maximal process error is about 6,7% based on the Monte Carlo simulation. So it has good process compatibility.
基金supported by the National Natural Science Foundation of China(Nos.60725415,60971066)the National High-Tech Research and Development Program of China(Nos.2009AA01Z258,2009AA01Z260)the National Science & Technology Important Project of China(No.2009ZX01034-002-001-005)
文摘To meet the accuracy requirement for the bandgap voltage reference by the increasing data conversion precision of integrated circuits,a high-order curvature-compensated bandgap voltage reference is presented employing the characteristic of bipolar transistor current gain exponentially changing with temperature variations.In addition,an over-temperature protection circuit with a thermal hysteresis function to prevent thermal oscillation is proposed.Based on the CSMC 0.5μm 20 V BCD process,the designed circuit is implemented;the active die area is 0.17×0.20 mm;. Simulation and testing results show that the temperature coefficient is 13.7 ppm/K with temperature ranging from -40 to 150℃,the power supply rejection ratio is -98.2 dB,the line regulation is 0.3 mV/V,and the power consumption is only 0.38 mW.The proposed bandgap voltage reference has good characteristics such as small area,low power consumption, good temperature stability,high power supply rejection ratio,as well as low line regulation.This circuit can effectively prevent thermal oscillation and is suitable for on-chip voltage reference in high precision analog,digital and mixed systems.
基金Project supported by the Fund of Liaoning Province Education Department(No.L2013045)
文摘A novel high-order curvature compensation negative voltage bandgap reference (NBGR) based on a novel multilevel compensation technique is introduced. Employing an exponential curvature compensation (ECC) term with many high order terms in itself, in a lower temperature range (TR) and a multilevel curvature compen- sation (MLCC) term in a higher TR, a flattened and better effect of curvature compensation over the TR of 165℃ (--40 to 125 ℃) is realised. The MLCC circuit adds two convex curves by using two sub-threshold operated NMOS. The proposed NBGR implemented in the Central Semiconductor Manufacturing Corporation (CSMC) 0.5 #m BCD technology demonstrates an accurate voltage of-1.183 V with a temperature coefficient (TC) as low as 2.45 ppm/℃over the TR of 165℃ at a -5.0 V power supply; the line regulation is 3 mV/V from a -5 to -2 V supply voltage. The active area of the presented NBGR is 370×180 μm2.