A new method of landslip monitoring in open-pit is presented, in which the monitoring data processing and a variety of deformation curvilinear drawings are carried out by microcomputer system, based on the practice in...A new method of landslip monitoring in open-pit is presented, in which the monitoring data processing and a variety of deformation curvilinear drawings are carried out by microcomputer system, based on the practice in Haizhou Open-Mine for many years. Meanwhile, the general regularity on landslip in open-pit is acquired.展开更多
薄膜晶体管(Thin film transistor,TFT)的栅极在截面方向上是一个台阶,栅极绝缘层(Gate Insulator,GI)和源漏极(Source和Data电极,SD电极)依次覆盖于台阶之上,覆盖程度以台阶覆盖率(台阶处GI层水平厚度与竖直厚度的比值)进行衡量。本文...薄膜晶体管(Thin film transistor,TFT)的栅极在截面方向上是一个台阶,栅极绝缘层(Gate Insulator,GI)和源漏极(Source和Data电极,SD电极)依次覆盖于台阶之上,覆盖程度以台阶覆盖率(台阶处GI层水平厚度与竖直厚度的比值)进行衡量。本文结合重庆京东方的HADS产品工艺制程,探究了栅极厚度、坡度角对GI层的台阶覆盖率的影响。同时,在覆盖率的基础上研究了台阶处和非台阶处的SD膜层刻蚀程度差异。结合量产中的不良,分析栅极坡度角、覆盖率、栅极腐蚀等相关不良的关系,并提出相应的良率提升措施。实验结果表明坡度角是影响GI覆盖率的关键因素,且栅极坡度角与GI覆盖率呈负线性关系。当栅极厚度在280~500 nm范围变化时,栅极坡度角每增加10°,GI层台阶覆盖率下降约20%。SD膜层覆盖在台阶上,因台阶的存在造成此处的SD层减薄,最终导致该处的SD膜层刻蚀程度加大。如果栅极坡度角偏大,会导致台阶处GI层减薄或者产生微裂纹,工艺制程中的腐蚀介质会透过减薄的GI层进而腐蚀栅极;此外,偏大的栅极坡度角会导致台阶处的SD电极有断线的风险。通过刻蚀液种类变更、刻蚀液成分微调、刻蚀工艺的优化可以降低栅极坡度角,规避上述良率风险。此外,对于栅极腐蚀型不良,也可以通过调整GI层的成膜参数来提升覆盖率。对于SD电极断线风险,可尝试增加光刻胶粘附力、台阶处SD线加宽等措施规避风险。展开更多
文摘A new method of landslip monitoring in open-pit is presented, in which the monitoring data processing and a variety of deformation curvilinear drawings are carried out by microcomputer system, based on the practice in Haizhou Open-Mine for many years. Meanwhile, the general regularity on landslip in open-pit is acquired.
文摘薄膜晶体管(Thin film transistor,TFT)的栅极在截面方向上是一个台阶,栅极绝缘层(Gate Insulator,GI)和源漏极(Source和Data电极,SD电极)依次覆盖于台阶之上,覆盖程度以台阶覆盖率(台阶处GI层水平厚度与竖直厚度的比值)进行衡量。本文结合重庆京东方的HADS产品工艺制程,探究了栅极厚度、坡度角对GI层的台阶覆盖率的影响。同时,在覆盖率的基础上研究了台阶处和非台阶处的SD膜层刻蚀程度差异。结合量产中的不良,分析栅极坡度角、覆盖率、栅极腐蚀等相关不良的关系,并提出相应的良率提升措施。实验结果表明坡度角是影响GI覆盖率的关键因素,且栅极坡度角与GI覆盖率呈负线性关系。当栅极厚度在280~500 nm范围变化时,栅极坡度角每增加10°,GI层台阶覆盖率下降约20%。SD膜层覆盖在台阶上,因台阶的存在造成此处的SD层减薄,最终导致该处的SD膜层刻蚀程度加大。如果栅极坡度角偏大,会导致台阶处GI层减薄或者产生微裂纹,工艺制程中的腐蚀介质会透过减薄的GI层进而腐蚀栅极;此外,偏大的栅极坡度角会导致台阶处的SD电极有断线的风险。通过刻蚀液种类变更、刻蚀液成分微调、刻蚀工艺的优化可以降低栅极坡度角,规避上述良率风险。此外,对于栅极腐蚀型不良,也可以通过调整GI层的成膜参数来提升覆盖率。对于SD电极断线风险,可尝试增加光刻胶粘附力、台阶处SD线加宽等措施规避风险。