In this paper discussions on ZnO based varistor ceramics doped with different ratios of Y2O3 are presented.Analysis on the phase and microstructures of the samples indicates that an additional phase is detected in the...In this paper discussions on ZnO based varistor ceramics doped with different ratios of Y2O3 are presented.Analysis on the phase and microstructures of the samples indicates that an additional phase is detected in the samples doped with Y2O3,and the average grain size of the specimens decreases from about 9.2μm to 4.5μm,with an increase in the addition of Y2O3 from 0 mol%to 3 mol%.The corresponding varistor’s voltage gradient markedly increases from 462 V/mm to 2340 V/mm,while the nonlinear coefficient decreases from 22.3 to 11.5,respectively.Furthermore,the characteristics of deep trap levels in these ZnO samples are investigated by measuring their dielectric spectroscopies.The trap energy level and capture cross section evaluated by relaxation peak of the Cole-Cole plot vary slightly as the addition of Y2O3 increases.These traps may be ascribed to the intrinsic defects of ZnO lattice.展开更多
无论氢在电子器件内部以何种形式(H2分子、H原子或H+离子)存在,均会对电子器件电离损伤产生作用,进而影响器件的抗辐照能力。本文深入研究了氢气和空气气氛条件下1 Me V电子辐照栅控横向PNP(GLPNP)型双极晶体管的辐射损伤缺陷演化行为...无论氢在电子器件内部以何种形式(H2分子、H原子或H+离子)存在,均会对电子器件电离损伤产生作用,进而影响器件的抗辐照能力。本文深入研究了氢气和空气气氛条件下1 Me V电子辐照栅控横向PNP(GLPNP)型双极晶体管的辐射损伤缺陷演化行为。利用Keithley 4200SCS半导体参数测试仪对不同气氛下辐照过程中晶体管进行在线原位电性能参数测试,研究晶体管电性能退化与电子辐照注量和氢气深度之间的关系;基于栅扫技术(GS)和深能级瞬态谱技术(DLTS),研究双极晶体管中氢诱导电离损伤缺陷演化的基本特征。研究表明,与空气气氛相比,氢气气氛下电子辐照导致GLPNP的基极电流增加显著,而集电极电流明显降低,产生更多的氧化物电荷和界面态,这些现象均说明氢气加剧双极晶体管的电离辐射损伤。展开更多
An improved analytical model for the current–voltage（I–V） characteristics of the 4H-SiC metal semiconductor field effect transistor（MESFET） on a high purity semi-insulating（HPSI） substrate with trapping and th...An improved analytical model for the current–voltage（I–V） characteristics of the 4H-SiC metal semiconductor field effect transistor（MESFET） on a high purity semi-insulating（HPSI） substrate with trapping and thermal effects is presented. The 4H-SiC MESFET structure includes a stack of HPSI substrates and a uniformly doped channel layer. The trapping effects include both the effect of multiple deep-level traps in the substrate and surface traps between the gate to source/drain. The self-heating effects are also incorporated to obtain the accurate and realistic nature of the analytical model. The importance of the proposed model is emphasised through the inclusion of the recent and exact nature of the traps in the 4H-SiC HPSI substrate responsible for substrate compensation.The analytical model is used to exhibit DC I–V characteristics of the device with and without trapping and thermal effects. From the results, the current degradation is observed due to the surface and substrate trapping effects and the negative conductance introduced by the self-heating effect at a high drain voltage. The calculated results are compared with reported experimental and two-dimensional simulations（Silvaco -TCAD）. The proposed model also illustrates the effectiveness of the gate–source distance scaling effect compared to the gate–drain scaling effect in optimizing 4H-SiC MESFET performance. Results demonstrate that the proposed I–V model of 4H-SiC MESFET is suitable for realizing SiC based monolithic circuits（MMICs） on HPSI substrates.展开更多
基金Supported by the National Natural Science Foundation of China(Grant Nos.50425721 and 50737001)the 11th Five-year Natural S&T Supporting Plan of China(Grant No.2006 BAAO2A16)
文摘In this paper discussions on ZnO based varistor ceramics doped with different ratios of Y2O3 are presented.Analysis on the phase and microstructures of the samples indicates that an additional phase is detected in the samples doped with Y2O3,and the average grain size of the specimens decreases from about 9.2μm to 4.5μm,with an increase in the addition of Y2O3 from 0 mol%to 3 mol%.The corresponding varistor’s voltage gradient markedly increases from 462 V/mm to 2340 V/mm,while the nonlinear coefficient decreases from 22.3 to 11.5,respectively.Furthermore,the characteristics of deep trap levels in these ZnO samples are investigated by measuring their dielectric spectroscopies.The trap energy level and capture cross section evaluated by relaxation peak of the Cole-Cole plot vary slightly as the addition of Y2O3 increases.These traps may be ascribed to the intrinsic defects of ZnO lattice.
文摘无论氢在电子器件内部以何种形式(H2分子、H原子或H+离子)存在,均会对电子器件电离损伤产生作用,进而影响器件的抗辐照能力。本文深入研究了氢气和空气气氛条件下1 Me V电子辐照栅控横向PNP(GLPNP)型双极晶体管的辐射损伤缺陷演化行为。利用Keithley 4200SCS半导体参数测试仪对不同气氛下辐照过程中晶体管进行在线原位电性能参数测试,研究晶体管电性能退化与电子辐照注量和氢气深度之间的关系;基于栅扫技术(GS)和深能级瞬态谱技术(DLTS),研究双极晶体管中氢诱导电离损伤缺陷演化的基本特征。研究表明,与空气气氛相比,氢气气氛下电子辐照导致GLPNP的基极电流增加显著,而集电极电流明显降低,产生更多的氧化物电荷和界面态,这些现象均说明氢气加剧双极晶体管的电离辐射损伤。
基金Projects (61274081, 50902113, 50902114) supported by the National Natural Science Foundation of ChinaProject (2011CB610406) supported by the National Basic Research Program of China+2 种基金Project (B08040) supported by the 111 Project of ChinaProject (JC20100228) supported by Foundation for Fundamental Research of Northwestern Polytechnical University (NPU), ChinaProject (SKLSP201012) supported by the Research Fund of the State Key Laboratory of Solidification Processing (NPU), China
文摘An improved analytical model for the current–voltage（I–V） characteristics of the 4H-SiC metal semiconductor field effect transistor（MESFET） on a high purity semi-insulating（HPSI） substrate with trapping and thermal effects is presented. The 4H-SiC MESFET structure includes a stack of HPSI substrates and a uniformly doped channel layer. The trapping effects include both the effect of multiple deep-level traps in the substrate and surface traps between the gate to source/drain. The self-heating effects are also incorporated to obtain the accurate and realistic nature of the analytical model. The importance of the proposed model is emphasised through the inclusion of the recent and exact nature of the traps in the 4H-SiC HPSI substrate responsible for substrate compensation.The analytical model is used to exhibit DC I–V characteristics of the device with and without trapping and thermal effects. From the results, the current degradation is observed due to the surface and substrate trapping effects and the negative conductance introduced by the self-heating effect at a high drain voltage. The calculated results are compared with reported experimental and two-dimensional simulations（Silvaco -TCAD）. The proposed model also illustrates the effectiveness of the gate–source distance scaling effect compared to the gate–drain scaling effect in optimizing 4H-SiC MESFET performance. Results demonstrate that the proposed I–V model of 4H-SiC MESFET is suitable for realizing SiC based monolithic circuits（MMICs） on HPSI substrates.
