We present a study on the single event transient （SET） induced by a pulsed laser in different silicon-germanium （SiGe） heterojunction bipolar transistors （HBTs） with the structure of local oxidation of silicon ...We present a study on the single event transient （SET） induced by a pulsed laser in different silicon-germanium （SiGe） heterojunction bipolar transistors （HBTs） with the structure of local oxidation of silicon （LOCOS） and deep trench isolation （DTI）. The experimental results are discussed in detail and it is demonstrated that a SiGe HBT with the structure of LOCOS is more sensitive than the DTI SiGe HBT in the SET. Because of the limitation of the DTI structure, the charge collection of diffusion in the DTI SiGe HBT is less than that of the LOCOS SiGe HBT. The SET sensitive area of the LOCOS SiGe HBT is located in the eollector-substrate （C/S） junction, while the sensitive area of the DTI SiGe HBT is located near to the collector electrodes.展开更多
A deep trench super-junction LDMOS with double charge compensation layer(DC DT SJ LDMOS)is proposed in this paper.Due to the capacitance effect of the deep trench which is known as silicon-insulator-silicon(SIS)capaci...A deep trench super-junction LDMOS with double charge compensation layer(DC DT SJ LDMOS)is proposed in this paper.Due to the capacitance effect of the deep trench which is known as silicon-insulator-silicon(SIS)capacitance,the charge balance in the super-junction region of the conventional deep trench SJ LDMOS(Con.DT SJ LDMOS)device will be broken,resulting in breakdown voltage(BV)of the device drops.DC DT SJ LDMOS solves the SIS capacitance effect by adding a vertical variable doped charge compensation layer and a triangular charge compensation layer inside the Con.DT SJ LDMOS device.Therefore,the drift region reaches an ideal charge balance state again.The electric field is optimized by double charge compensation and gate field plate so that the breakdown voltage of the proposed device is improved sharply,meanwhile the enlarged on-current region reduces its specific on-resistance.The simulation results show that compared with the Con.DT SJ LD-MOS,the BV of the DC DT SJ LDMOS has been increased from 549.5 to 705.5 V,and the R_(on,sp) decreased to 23.7 mΩ·cm^(2).展开更多
Silicon superjunction power MOSFETs were fabricated with deep trench etching and epitaxial growth,based on the process platform of the Shanghai Hua Hong NEC Electronics Company Limited.The breakdown voltages of the fa...Silicon superjunction power MOSFETs were fabricated with deep trench etching and epitaxial growth,based on the process platform of the Shanghai Hua Hong NEC Electronics Company Limited.The breakdown voltages of the fabricated superjunction MOSFETs are above 700 V and agree with the simulation.The dynamic characteristics, especially reverse diode characteristics,are equivalent or even superior to foreign counterparts.展开更多
The process reasons for weak point formation of the deep trench on SOI wafers have been analyzed in detail. An optimized trench process is also proposed. It is found that there are two main reasons： one is over-etchi...The process reasons for weak point formation of the deep trench on SOI wafers have been analyzed in detail. An optimized trench process is also proposed. It is found that there are two main reasons： one is over-etching laterally of the silicon on the surface of the buried oxide caused by a fringe effect; and the other is the slow growth rate of the isolation oxide in the concave silicon comer of the trench bottom. In order to improve the isolation performance of the deep trench, two feasible ways for optimizing the trench process are proposed. The improved process thickens the isolation oxide and rounds sharp silicon comers at their weak points, increasing the applied voltage by 15-20 V at the same leakage current. The proposed new trench isolation process has been verified in the foundry＇s 0.5-μm HV SOI technology.展开更多
We conducted a detailed analysis of along-trench variations in the flexural bending of the subducting Pacific Plate at the Tonga-Kermadec Trench.Inversions were conducted to obtain best-fitting solutions of trench-axi...We conducted a detailed analysis of along-trench variations in the flexural bending of the subducting Pacific Plate at the Tonga-Kermadec Trench.Inversions were conducted to obtain best-fitting solutions of trench-axis loadings and variations in the effective elastic plate thickness for the analyzed flexural bending profiles.Results of the analyses revealed significant along-trench variations in plate flexural bending:the trench relief(W0)of 1.9 to 5.1 km;trench-axis vertical loading(V0)of-0.5×10^12 to 2.2×10^12 N/m;axial bending moment(M0)of 0.1×10^17 to 2.2×10^17 N;effective elastic plate thickness seaward of the outer-rise region(Te^M)of 20 to 65 km,trench-ward of the outer-rise(Te^M)of 11 to 33 km,and the transition distance(Xr)of 20 to 95 km.The Horizon Deep,the second greatest trench depth in the world,has the greatest trench relief(W0 of 5.1km)and trench-axis loading(V0 of 2.2×10^12N/m);these values are only slightly smaller than that of the Challenger Deep(W0 of 5.7km and V0 of 2.9×10^12N/m)and similar to that of the Sirena Deep(W0 of 5.2 km and V0 of 2.0×10^12 N/m)of the Mariana Trench,suggesting that these deeps are linked to great flexural bending of the subducting plates.Analyses using three independent methods,i.e.,the/inversion,the flexural curvature/yield strength envelope analysis,and the elasto-plastic bending model with normal faults,all yielded similar average Te reduction of 28%-36% and average Te reduction area S△Te of 1195-1402 km^2 near the trench axis.The calculated brittle yield zone depth from the flexural curvature/yield strength envelope analysis is also consistent with the distribution of the observed normal faulting earthquakes.Comparisons of the Manila,Philippine,Tonga-Kermadec,Japan,and Mariana Trenches revealed that the average values Te^M of Te^M and both in general increase with the subducting plate age.展开更多
Dry etching of silicon is an essential process step for the fabrication of Micro electromechancal system (MEMS). The AZ7220 positive photo-resist was used as the etching mask and silicon micro-trenches were fabricated...Dry etching of silicon is an essential process step for the fabrication of Micro electromechancal system (MEMS). The AZ7220 positive photo-resist was used as the etching mask and silicon micro-trenches were fabricated with a multiplexed indu ctively coupled plasma (ICP) etcher. The influence of resist pattern profile, an d etch condition on sidewall roughness were investigated detail. The results sho w that the sidewall roughness of micro-trench depends on profiles of photo-resis t pattern, the initial interface between the resist bottom surface and silicon s urface heavily. The relationship between roughness and process optimization para meters are presented in the paper. The roughness of the sidewall has been decrea sed to a 20-50nm with this experiment.展开更多
基金Supported by the National Natural Science Foundation of China under Grant Nos 61274106
文摘We present a study on the single event transient （SET） induced by a pulsed laser in different silicon-germanium （SiGe） heterojunction bipolar transistors （HBTs） with the structure of local oxidation of silicon （LOCOS） and deep trench isolation （DTI）. The experimental results are discussed in detail and it is demonstrated that a SiGe HBT with the structure of LOCOS is more sensitive than the DTI SiGe HBT in the SET. Because of the limitation of the DTI structure, the charge collection of diffusion in the DTI SiGe HBT is less than that of the LOCOS SiGe HBT. The SET sensitive area of the LOCOS SiGe HBT is located in the eollector-substrate （C/S） junction, while the sensitive area of the DTI SiGe HBT is located near to the collector electrodes.
文摘A deep trench super-junction LDMOS with double charge compensation layer(DC DT SJ LDMOS)is proposed in this paper.Due to the capacitance effect of the deep trench which is known as silicon-insulator-silicon(SIS)capacitance,the charge balance in the super-junction region of the conventional deep trench SJ LDMOS(Con.DT SJ LDMOS)device will be broken,resulting in breakdown voltage(BV)of the device drops.DC DT SJ LDMOS solves the SIS capacitance effect by adding a vertical variable doped charge compensation layer and a triangular charge compensation layer inside the Con.DT SJ LDMOS device.Therefore,the drift region reaches an ideal charge balance state again.The electric field is optimized by double charge compensation and gate field plate so that the breakdown voltage of the proposed device is improved sharply,meanwhile the enlarged on-current region reduces its specific on-resistance.The simulation results show that compared with the Con.DT SJ LD-MOS,the BV of the DC DT SJ LDMOS has been increased from 549.5 to 705.5 V,and the R_(on,sp) decreased to 23.7 mΩ·cm^(2).
文摘Silicon superjunction power MOSFETs were fabricated with deep trench etching and epitaxial growth,based on the process platform of the Shanghai Hua Hong NEC Electronics Company Limited.The breakdown voltages of the fabricated superjunction MOSFETs are above 700 V and agree with the simulation.The dynamic characteristics, especially reverse diode characteristics,are equivalent or even superior to foreign counterparts.
文摘The process reasons for weak point formation of the deep trench on SOI wafers have been analyzed in detail. An optimized trench process is also proposed. It is found that there are two main reasons： one is over-etching laterally of the silicon on the surface of the buried oxide caused by a fringe effect; and the other is the slow growth rate of the isolation oxide in the concave silicon comer of the trench bottom. In order to improve the isolation performance of the deep trench, two feasible ways for optimizing the trench process are proposed. The improved process thickens the isolation oxide and rounds sharp silicon comers at their weak points, increasing the applied voltage by 15-20 V at the same leakage current. The proposed new trench isolation process has been verified in the foundry＇s 0.5-μm HV SOI technology.
基金The National Natural Science Foundation of China under contract Nos 41976064,91958211,41890813,91858207,91628301,U1606401,41976066 and 41706056the Programs of the Chinese Academy of Sciences under contract Nos Y4SL021001,QYZDY-SSW-DQC005 and 133244KYSB20180029+1 种基金the National Key Research and Development Program of China under contract Nos2018YFC0309800 and 2018YFC0310100the China Ocean Mineral Resources R&D Association under contract No.DY135-S2-1-04
文摘We conducted a detailed analysis of along-trench variations in the flexural bending of the subducting Pacific Plate at the Tonga-Kermadec Trench.Inversions were conducted to obtain best-fitting solutions of trench-axis loadings and variations in the effective elastic plate thickness for the analyzed flexural bending profiles.Results of the analyses revealed significant along-trench variations in plate flexural bending:the trench relief(W0)of 1.9 to 5.1 km;trench-axis vertical loading(V0)of-0.5×10^12 to 2.2×10^12 N/m;axial bending moment(M0)of 0.1×10^17 to 2.2×10^17 N;effective elastic plate thickness seaward of the outer-rise region(Te^M)of 20 to 65 km,trench-ward of the outer-rise(Te^M)of 11 to 33 km,and the transition distance(Xr)of 20 to 95 km.The Horizon Deep,the second greatest trench depth in the world,has the greatest trench relief(W0 of 5.1km)and trench-axis loading(V0 of 2.2×10^12N/m);these values are only slightly smaller than that of the Challenger Deep(W0 of 5.7km and V0 of 2.9×10^12N/m)and similar to that of the Sirena Deep(W0 of 5.2 km and V0 of 2.0×10^12 N/m)of the Mariana Trench,suggesting that these deeps are linked to great flexural bending of the subducting plates.Analyses using three independent methods,i.e.,the/inversion,the flexural curvature/yield strength envelope analysis,and the elasto-plastic bending model with normal faults,all yielded similar average Te reduction of 28%-36% and average Te reduction area S△Te of 1195-1402 km^2 near the trench axis.The calculated brittle yield zone depth from the flexural curvature/yield strength envelope analysis is also consistent with the distribution of the observed normal faulting earthquakes.Comparisons of the Manila,Philippine,Tonga-Kermadec,Japan,and Mariana Trenches revealed that the average values Te^M of Te^M and both in general increase with the subducting plate age.
文摘Dry etching of silicon is an essential process step for the fabrication of Micro electromechancal system (MEMS). The AZ7220 positive photo-resist was used as the etching mask and silicon micro-trenches were fabricated with a multiplexed indu ctively coupled plasma (ICP) etcher. The influence of resist pattern profile, an d etch condition on sidewall roughness were investigated detail. The results sho w that the sidewall roughness of micro-trench depends on profiles of photo-resis t pattern, the initial interface between the resist bottom surface and silicon s urface heavily. The relationship between roughness and process optimization para meters are presented in the paper. The roughness of the sidewall has been decrea sed to a 20-50nm with this experiment.
