Silicon superjunction power MOSFETs were fabricated with deep trench etching and epitaxial growth,based on the process platform of the Shanghai Hua Hong NEC Electronics Company Limited.The breakdown voltages of the fa...Silicon superjunction power MOSFETs were fabricated with deep trench etching and epitaxial growth,based on the process platform of the Shanghai Hua Hong NEC Electronics Company Limited.The breakdown voltages of the fabricated superjunction MOSFETs are above 700 V and agree with the simulation.The dynamic characteristics, especially reverse diode characteristics,are equivalent or even superior to foreign counterparts.展开更多
Dry etching of silicon is an essential process step for the fabrication of Micro electromechancal system (MEMS). The AZ7220 positive photo-resist was used as the etching mask and silicon micro-trenches were fabricated...Dry etching of silicon is an essential process step for the fabrication of Micro electromechancal system (MEMS). The AZ7220 positive photo-resist was used as the etching mask and silicon micro-trenches were fabricated with a multiplexed indu ctively coupled plasma (ICP) etcher. The influence of resist pattern profile, an d etch condition on sidewall roughness were investigated detail. The results sho w that the sidewall roughness of micro-trench depends on profiles of photo-resis t pattern, the initial interface between the resist bottom surface and silicon s urface heavily. The relationship between roughness and process optimization para meters are presented in the paper. The roughness of the sidewall has been decrea sed to a 20-50nm with this experiment.展开更多
随着系统向高速度、低功耗、低电压和多媒体、网络化、移动化的发展,系统对电路的要求越来越高,在需求牵引和技术推动的双重作用下,出现了将整个系统集成在一个微电子芯片上的系统芯片(System On A Chip,SOC)概念。采用SOC的设计方式可...随着系统向高速度、低功耗、低电压和多媒体、网络化、移动化的发展,系统对电路的要求越来越高,在需求牵引和技术推动的双重作用下,出现了将整个系统集成在一个微电子芯片上的系统芯片(System On A Chip,SOC)概念。采用SOC的设计方式可以使芯片面积向小尺寸、高集成度方向发展。SOC设计的系统芯片能够得以实现是以不断发展的芯片制造技术为依托的。文章介绍了基于深槽介质工艺制作高密度电容的技术,通过深槽工艺技术实现大的存储电容。该电容制作采用深槽刻蚀、ONO介质、原位掺杂多晶(ISDP)填充等工艺技术,可以增加电容密度达20倍,提高了电路集成度,其性能优良、漏电极低。展开更多
功率半导体器件以其优越的电特性在许多领域取代了传统的双极型晶体管。功率半导体器件导通电阻由于受击穿电压限制而存在一个极限即硅限而无法再降低。"超级结理论"的应用,使导通电阻相对于传统技术降低了80%~90%,打破了硅限...功率半导体器件以其优越的电特性在许多领域取代了传统的双极型晶体管。功率半导体器件导通电阻由于受击穿电压限制而存在一个极限即硅限而无法再降低。"超级结理论"的应用,使导通电阻相对于传统技术降低了80%~90%,打破了硅限,提高了开关速度。通过对腔体压力、温度、RF功率、气体流量、硅片图形密度和刻蚀面积等各种工艺参数的实验,研究其对深沟槽超级结(Deep Trench Super Junction)高压器件干法刻蚀工艺的影响与作用,实现单步干法刻蚀就在硅衬底上形成深沟槽。展开更多
文摘Silicon superjunction power MOSFETs were fabricated with deep trench etching and epitaxial growth,based on the process platform of the Shanghai Hua Hong NEC Electronics Company Limited.The breakdown voltages of the fabricated superjunction MOSFETs are above 700 V and agree with the simulation.The dynamic characteristics, especially reverse diode characteristics,are equivalent or even superior to foreign counterparts.
文摘Dry etching of silicon is an essential process step for the fabrication of Micro electromechancal system (MEMS). The AZ7220 positive photo-resist was used as the etching mask and silicon micro-trenches were fabricated with a multiplexed indu ctively coupled plasma (ICP) etcher. The influence of resist pattern profile, an d etch condition on sidewall roughness were investigated detail. The results sho w that the sidewall roughness of micro-trench depends on profiles of photo-resis t pattern, the initial interface between the resist bottom surface and silicon s urface heavily. The relationship between roughness and process optimization para meters are presented in the paper. The roughness of the sidewall has been decrea sed to a 20-50nm with this experiment.
文摘随着系统向高速度、低功耗、低电压和多媒体、网络化、移动化的发展,系统对电路的要求越来越高,在需求牵引和技术推动的双重作用下,出现了将整个系统集成在一个微电子芯片上的系统芯片(System On A Chip,SOC)概念。采用SOC的设计方式可以使芯片面积向小尺寸、高集成度方向发展。SOC设计的系统芯片能够得以实现是以不断发展的芯片制造技术为依托的。文章介绍了基于深槽介质工艺制作高密度电容的技术,通过深槽工艺技术实现大的存储电容。该电容制作采用深槽刻蚀、ONO介质、原位掺杂多晶(ISDP)填充等工艺技术,可以增加电容密度达20倍,提高了电路集成度,其性能优良、漏电极低。
文摘功率半导体器件以其优越的电特性在许多领域取代了传统的双极型晶体管。功率半导体器件导通电阻由于受击穿电压限制而存在一个极限即硅限而无法再降低。"超级结理论"的应用,使导通电阻相对于传统技术降低了80%~90%,打破了硅限,提高了开关速度。通过对腔体压力、温度、RF功率、气体流量、硅片图形密度和刻蚀面积等各种工艺参数的实验,研究其对深沟槽超级结(Deep Trench Super Junction)高压器件干法刻蚀工艺的影响与作用,实现单步干法刻蚀就在硅衬底上形成深沟槽。
