Practical pattern-based design recovery approach

A practical approach is presented to enlarge the recoverable scope and improve the precision of pattern recovery. To specify both structural aspects and behavioral aspects of design patterns, we introduce traditional predicate logic combined with Alien's interval-based temporal logic as our theoretical foundation. Moreover, we take the Visitor pattern as an example to illustrate how to specify design patterns to support recovery of design patterns besides structural category. The experimental results show that the approach presented is practical for recovering design information of real world systems.

Teaching Design of“ Digital Logic Design” Course Based on Blended Teaching Mode

How to design and organize the implementation of teaching is an important consideration for the quality of the course.This paper takes the“Digital Logic Design”course as an example,and carries out teaching design and practice based on the blended teaching mode.By adopting various forms such as MOOC+SPOC+theme seminars,beneficial explorations have been made in improving students’autonomous learning ability,strengthening engineering literacy,and cultivating innovation ability.

Systematic Logic Controller Design as Sequential Function Chart Starting from Informal Specifications

Today＇s automation industry is driven by the need for an increased productivity, higher flexibility, and higher individuality, and characterized by tailor-made and more complex control solutions. In the processing industry, logic controller design is often a manual, experience-based, and thus an error-prone procedure. Typically, the specifications are given by a set of informal requirements and a technical flowchart and both are used to be directly translated into the control code. This paper proposes a method in which the control program is constructed as a sequential function chart （SFC） by transforming the requirements via clearly defined intermediate formats. For the purpose of analysis, the resulting SFC can be translated algorithmically into timed automata. A rigorous verification can be used to determine whether all specifications are satisfied if a formal model of the plant is available which is then composed with the automata model of the logic controller （LC）.

DESIGN OF MULTI-SERVICE SDH NETWORKS: FORMULATION AND HEURISTICS

Multi-service SDH networks support both packet- and circuit-switched traffic. Optimal design of such a network means to guarantee the circuit connections and configure a logical packet-switched topology with lowest congestion. This letter first formulates the problem as a mixed integer linear programming, which achieves optimal solution but has high computation. Then a heuristic algorithm is proposed to yield near-optimal solution efficiently. Performance of the algorithm is verified by an example.

Study on the System Design of Multiple Expert Systems Integrated Decision Support System

There has been an increasing interest in integrating decision support systems (DSS) and expert systems (ES) to provide decision makers a more accessible, productive and domain-independent information and computing environment. This paper is aimed at designing a multiple expert systems integrated decision support system (MESIDSS) to enhance decision makers' ability in more complex cases. The basic framework, management system of multiple ESs, and functions of MESIDSS are presented. The applications of MESIDSS in large-scale decision making processes are discussed from the following aspects of problem decomposing, dynamic combination of multiple ESs, link of multiple bases and decision coordinating. Finally, a summary and some ideas for the future are presented.

Design and Development of Garment Fabric Database Management System

The main performance characteristics of garment fabric are analyzed and extracted,which include physical characteristics,appearance characteristics and subjective evaluation characteristics.A calculating model of fabric’s subjective evaluation is provided,which can be adjusted as the data increasing.The database system of garment fabric is analyzed,and then function design,concept design and logic design are carried out.The user interface(UI)design of garment fabric database system is described.The system can not only serve the fabric management and customization of garment enterprises,but also serve the teaching work of colleges and universities,because it is rich in information and convenient.It is of great significance to digital construction in the clothing field.

Shape Anisotropy and Resonance Mode Guided Reliable Interconnect Design for In-plane Magnetic Logic

Dipole coupled nanomagnets controlled by the static Zeeman field can form various magnetic logic interconnects.However, the corner wire interconnect is often unreliable and error-prone at room temperature. In this study, we address this problem by making it into a reliable type with trapezoid-shaped nanomagnets, the shape anisotropy of which helps to offer the robustness. The building method of the proposed corner wire interconnect is discussed,and both its static and dynamic magnetization properties are investigated. Static micromagnetic simulation demonstrates that it can work correctly and reliably. Dynamic response results are reached by imposing an ac microwave field on the proposed corner wire. It is found that strong ferromagnetic resonance absorption appears at a low frequency. With the help of a very small ac field with the peak resonance frequency, the required static Zeeman field to switch the corner wire is significantly decreased by ~21 m T. This novel interconnect would pave the way for the realization of reliable and low power nanomagnetic logic circuits.

Reconfigurable dynamic all-optical chaotic logic operations in an optically injected VCSEL

In a chaotic system of vertical cavity surface emitting laser （VCSEL） with external optical-injection, we propose a novel implementation scheme for reconfigurable dynamic all-optical chaotic logic operations （AOCLOs）. Under different key parameters, such as the bias current, the injection strength and the frequency detuning of the injected light field and the VCSEL, we also explore the evolutions of the polarization-bistability with the amplitude of the injected light field when the output of VCSEL is chaotic wave. According to the dynamic evolutions, we find out the optimal value of the frequency detuning that is considered as a control logic signal, and further implement different AOCLOs, such as AND, NAND, OR, NOR, XOR, and XNOR, by controlling the logic operation of the control logic signal between two logic inputs. Moreover, the ability to reconstruct these logic operations is demonstrated under relatively low noise strength of the spontaneous emission.

Process of Security Assurance Technique for Application Functional Logic in E-Commerce Systems

Security practices such as Audits that often focus on penetration testing are performed to find flaws in some types of vulnerability & use tools, which have been tailored to resolve certain risks based on code errors, code conceptual assumptions bugs, etc. Most existing security practices in e-Commerce are dealt with as an auditing activity. They may have policies of security, which are enforced by auditors who enable a particular set of items to be reviewed, but also fail to find vulnerabilities, which have been established in compliance with application logic. In this paper, we will investigate the problem of business logic vulnerability in the component-based rapid development of e-commerce applications while reusing design specification of component. We propose secure application functional processing Logic Security technique for component-based e-commerce application, based on security requirement of e-business process and security assurance logical component behaviour specification approach to formulize and design a solution for business logic vulnerability phenomena.

An Implementation of ARM Debugger based on Ethernet Interface

To solve the issue of downloading speed and application scenarios limitation of current JTAGLink debugger, this paper presents a new scheme of ARM debugger with the feature of Ethemet interface implemented by pure hardware logic design. This paper outlines the principle of the scheme, blocks of logic design, and protocols design. The scheme provides higher downloading speed, wider flexibility on application, and improves work efficiency evidently. Key words： JTAGLink Debugger; Ethernet; FPGA; Logic Design

Design of Multivalued Circuits Based on an Algebra for Current-Mode CMOS Multivalued Circuits

An algebra proposed for current-mode CMOS multivalued circuits is briefly reviewed. This paper discusses its application in the design of multivalued circults. Several current-mode CMOS quaternary and quinary circuits are de-signed by algebraic means. The design method based on this algebra may offer a design simpler than the previously knowll ones.

A Method for Minimization Design of Two-Level Logic Networks Using Multiplexer Universal Logic Modules

A decomposition approach of the combinational functions is discussed. A design method, by which the minimization or near minimization of two-level combinational network can be obtained, is presented for a combinational function realized by using multiplexer universal logic modules. Using the method, the automated synthesis of the combinational functions can be accomplished on a computer.

Near-Threshold Wide-Voltage Design Review

This paper presents a comprehensive review of near-threshold wide-voltage designs on memory,resilient logic designs,low voltage Radio Frequency(RF)circuits,and timing analysis.With the prosperous development of wearable applications,low power consumption has become one of the primary challenges for IC designs.To improve the power efficiency,the prefer scheme is to operate at an ultra low voltage of Near Threshold Voltage(NTV).For the performance variation and degradation,a self-adaptive margin assignment technique is proposed in the low voltage.The proposed technique tracks the circuit states in real time and dynamically allocates voltage margins,reducing the minimum supply voltage and achieving higher energy efficiency.The self-adaptive margin assignment technique can be used in Static Random Access Memory(SRAM),digital circuits,and analog/RF circuits.Based on the self-adaptive margin assignment technique,the minimum voltage in the 40 nm CMOS process is reduced to 0.6 V or even lower,and the energy efficiency is increased by 3–4 times.

MOSFET-like CNFET based logic gate library for low-power application:a comparative study

The next generation oflogic gate devices are expected to depend upon radically new technologies mainly due to the increasing difficulties and limitations of existing CMOS technology. MOSFET like CNFETs should ideally be the best devices to work with for high-performance VLS1. This paper presents results of a comprehensive comparative study of MOSFET-like carbon nanotube field effect transistors （CNFETs） technology based logic gate library for high-speed, low-power operation than conventional bulk CMOS libraries. It focuses on comparing four promising logic families namely： complementary-CMOS （C-CMOS）, transmission gate （TG）, complementary pass logic （CPL） and Domino logic （DL） styles are presented. Based on these logic styles, the proposed library of static and dynamic NAND-NOR logic gates, XOR, multiplexer and full adder functions are implemented efficiently and carefully analyzed with a test bench to measure propagation delay and power dissipation as a function of supply voltage. This analysis provides the right choice of logic style for low-power, high-speed applications. Proposed logic gates libraries are simulated using Synopsys HSPICE based on the standard 32 nm CNFET model. The simulation results demonstrate that, it is best to use C-CMOS logic style gates that are implemented in CNFET technology which are superior in performance compared to other logic styles, because of their low average powerdelay-product （PDP）. The analysis also demonstrates how the optimum supply voltage varies with logic styles in ultra-low power systems. The robustness of the proposed logic gate library is also compared with conventional and state-art of CMOS logic gate libraries.

Study on the Integration of Decision Support System with Multiple Expert Systems

This paper is aimed at designing an integrated framework of DSS with multiple ESs to enhance decision makers’ability in more complex cases.The basic intedrated frameword,knowledge organization and management of multiple ESs system (MESS),are presented.The following aspects:combing opinions form multiple ESs,problem-based model integration,and inconsistency processing among multiple ESs are emphatically doscissed. Finally,a summary and some ideas for the future are even.