Digital仿真测试在改进数字逻辑课程教学中的应用探究--基于与Logisim软件的比较

针对数字逻辑课程教材中的一处错误,提出使用Digital仿真软件进行测试的改进方案。分析表明:Digital仿真软件能用于组合逻辑电路与时序逻辑电路的测试;其不仅可使用真值表实现测试,还可用测试语句构建大规模的复杂测试用例,更适用于数字逻辑课程教学中设计题目的测试。进一步与Logisim软件比较表明:Digital软件测试功能更强,波形观察方便,更有助于实验和测试;考虑了电源和接地、外接端子均为双向连接,Digital软件所构建和仿真的电路更加符合实际;其RAM器件类型更多,有助于仿真完整的计算机系统。据此提出,在数字电路和计算机组成原理等硬件课程教学中推广使用Digital软件。

Testing Cross-Talk Induced Delay Faults in Digital Circuit Based on Transient Current Analysis

The delay fault induced by cross-talk effect is one of the difficult problems in the fault diagnosis of digital circuit. An intelligent fault diagnosis based on IDDT testing and support vector machines （SVM） classifier was proposed in this paper. Firstly, the fault model induced by cross-talk effect and the IDDT testing method were analyzed, and then a delay fault localization method based on SVM was presented. The fault features of the sampled signals were extracted by wavelet packet decomposition and served as input parameters of SVM classifier to classify the different fault types. The simulation results illustrate that the method presented is accurate and effective, reaches a high diagnosis rate above 95%.

Application of digital driving circuit in arc welding power source based on HCPL-316J

The digitalization of arc welding power source mainly depends on the digitalization of arc welding inverter,so that main circuit and controlling system can give full play to advantages.Digital switching control makes main circuit digital and DSP and/or MCU makes controlling system,digital.So IGBT driving circuit,as a tie of main circuit and controlling system,should also be got digitalized.Thus,a digital driving circuit based on optocoupler device HCPL-316 J is provided.Some testing experiments were done.After driving testing,the driving circuit certificates that driving waveforms satisfy the requirements of arc welding power source and the driving circuit is reasonably and simply designed.And the driving circuit has high controlling precision and reliability.No-load-voltage testing and welding external characteristic testing prove that the driving circuit can be applied in arc welding power source.

Evolutionary Design of Fault-Tolerant Digital Circuit Based on Cartesian Genetic Programming

In many areas, reliability of the digital circuits has become the key factor to restrict circuit development. Fault-tolerant design is the commonly used method to improve the reliability of digital circuits. The current fault-tolerant design methods are based on triple modular redundancy( TMR) or multiple modular redundancy( MMR). These redundancy designs rely on the experience of the designers,and the designed circuits have poor adaptabilities to a complex environment. However, evolutionary design of digital circuits does not rely on prior knowledge. During the evolution, some novel and optimal circuit topologies can be found, and the evolved circuits can feature strong adaptive capacities. Based on Cartesian genetic programming( CGP), a novel method for designing fault-tolerant digital circuits by evolution is proposed,key steps of the evolution are introduced,influences of function sets on evolution are investigated,and as a preliminary result,an evolved full adder with high fault-tolerance is shown.

Design of Digital Circuit Experiment Course Based on FPGA

With the development of integrated circuit, the content of digital circuit experiment course is constantly updated. In order to keep up with the development trend of the Times and make students’ professional knowledge meet the needs of the industry, the school adopts the FPGA experimental platform to carry out teaching reform from the two aspects of platform and experiment, and carry out reasonable experimental planning to enrich the experimental content. In this paper, the traditional knowledge points of logic algebra, trigger, timer, counter, decoder and digital tube are organically combined, and the digital clock system is designed and realized. The practice shows that the combination of modern design method and traditional digital circuit teaching method can play a good teaching effect. In this way, students can also fully learn, understand and skillfully use the new technology in the experiment, and in the process of building a comprehensive understanding of digital circuits.

VST/DL Digital Circuit Testing & Analytical System

An important means for digital circuit analysis, design. maintenance and production is the IC chip test and analysis. With digital circuit application prevailing today, the automatic test and analysis of digital circuits is going to play a more important role. It can save a great deal of time and cost for the maintenance of equipment and can also provide correst analytical data for designers.

DIGITAL CIRCUIT MACROMODELING WITH PSPICE

Ordinary algebra is used to represent Boolean algebra on logic variables with states 0 and 1, so to achieve a unify approach to simulated both digital and analog circuit in PSPICE. Result on mixed A/D simulation shows a save in memory but generally longer run time.

THE NEW SUPER-HIGH-SPEED DIGITAL CIRCUIT BASED ON LINEAR AND-OR GATES

The paper reveals the relation between the linear AND-OR gate and the emitter function logic. With theoretic calculation and PSPICE simulation, the paper proves that the linear AND-OR gates can work at super-high-speed and can be multi-cascaded. On the basis of analyzing the high-speed switch units which coordinate with linear AND-OR gates, two kinds of emitter coupled logic circuits are designed. The paper also discusses the design principles of super-high-speed digital circuits, and some examples of combinational and sequential circuits using linear AND-OR gate are given.

Reconfigurable Digital Circuits Based on Chip Expander with Integrated Temperature Regulation

This article is dealing with a development of custom chip expander platform with the possibility of accurate temperature control and integration of additional silicon-based features. Such platform may serve as a useful tool which facilitates the burdens connected with measurement and analysis tasks of experimental semiconductor structures. The devised solution provides the functionality of carrier substrate (Al2O3 compound) with CTE compatibility to the experimental silicon chip and is fully customizable with respect to a particular chip. It also allows achieving an easy fan-out of small-diameter chip terminals into a larger, more convenient area and placement of chip specimens conveniently into space-constrained chamber of the AFM microscopes, probe stations, etc. Real application of the developed chip expander platform is demonstrated in context of digital reconfigurable circuits based on polymorphic electronics. In this case the chip expander with attached polymorphic chip REPOMO is thermally stabilized at an ambient temperature level up to approximately 135。C and its sensitivity to this phenomenon is demonstrated.

TRANSIENT CHARACTERISTIC ANALYSIS OF HIGH TEMPERATURE CMOS DIGITAL INTEGRATED CIRCUITS

This paper analyses the transient characteristics of high temperature CMOS inverters and gate circuits, and gives the computational formulas of their rise time, fall time and delay time. It may be concluded that the transient characteristics of CMOS inverters and gate circuits deteriorate due to the reduction of carrier mobilities and threshold voltages of MOS transistors and the increase of leakage currents of MOS transistors drain terminal pn junctions. The calculation results can explain the experimental phenomenon.

Optimized Implementation for Wave Digital Filter Based Circuit Emulation on FPGA

A binary tree representation is designed in this paper for optimization of wave digital filter（WDF）implementation.To achieve this,an equivalent WDF model of the original circuit is converted into abinary tree representation at first.This WDF binary tree can then be transformed to several topologies with the same implication,since the WDF adaptors have a symmetrical behavior on their ports.Because the WDF implementation is related to field programmable gate array（FPGA）resource usage and the cycle time of emulation,choosing aproper binary tree topology for WDF implementation can help balance the complexity and performance quality of an emulation system.Both WDF-FPGA emulation and HSpice simulation on the same circuit are tested.There is no significant difference between these two simulations.However,in terms of time consumption,the WDF-FPGA emulation has an advantage over the other.Our experiment also demonstrates that the optimized WDF-FPGA emulation has an acceptable accuracy and feasibility.

数字电路在线实物实验平台建设与教学

围绕如何突破实验教学时空限制,以及满足高阶性数字电路实验教学需要,建设了数字电路在线实物实验教学平台。依托平台打造了线上线下相融合的实验模式,开发了系列在线实验教学项目,以DDS信号发生器设计为例介绍在线实物实验教学设计和实验特色;基于平台开发的实验项目已在国内多所高校推广使用,为同类课程信息化建设与教学改革提供了可借鉴的经验。

一种支持SoC数字电路老化及寿命的评估方法

使用Spice可靠性仿真技术和高温稳态寿命(HTOL)实验相结合的方法,研究不同的MOSFET器件组成的环振电路在持续翻转状态下,不同应力时间和应力电压对其寿命退化的影响。依据仿真结果和Power-Law模型建立数字电路的寿命预测理论模型。通过HTOL实验验证模型的准确性。结果表明,随着时间的增加,器件的寿命退化率逐渐增加,且随着时间的推移,寿命的变化率越来越小。随着应力电压的增加,器件的寿命退化率更快趋向于稳定。器件退化符合R-D模型,仿真结果与试验结果高度,进一步证实了本模型对SoC数字电路寿命预测的准确性。通过这种组合仿真和实验的方法,可以更加准确地评估数字电路的寿命,为芯片制造过程中的可靠性设计提供参考。

黑盒与逆向工程概念在数字电路基础实验教学中的应用

随着电子信息技术的飞速发展,传统数字电路实验内容虽较为经典,其授课模式难以真实反映学生实验完成情况,难以有效促进学生对理论课程知识的深入理解。对此摒弃传统FPGA黑盒实验系统中的正向验证方式,采取逆向分析方法,通过对电路外特性测试,进行电路功能判断,强化学生数字电路理论知识,提高学生逆向工程、自主设计和工程应用能力。实验设计符合工程教育认证标准,提高数字电路实验教学质量。

OBE 理念下“数字集成电路设计”课程教学改革

“数字集成电路设计”是微电子科学与工程专业重要的专业核心课。在课程中引入OBE教学理念,以学生毕业从事集成电路设计工作应达成的能力目标为导向,逆向设计课程教学方案。从课程理论讲授到工程项目案例教学,对学习目标达成情况进行跟踪并针对教学活动和目标持续改进,形成面向能力目标的教学效果评价体系。帮助学生独立解决科学与工程问题,锻炼了学生的工程实践能力和创新能力。

“数字电路与逻辑设计”课程改革与实践

针对“数字电路与逻辑设计”课程教学过程存在的问题,以培养学生系统设计能力、软硬件协同设计和调试能力为目标,完善教学大纲和课件,建设“学习通”线上课程教学资源,采取线上线下混合教学模式,制作微课视频和课程案例库,增加课程大作业,重新修订实验指导书,采取多元化的考核和评价体系。实践表明,课程改革实施效果较好,提高了学生工程实践能力,兼顾了基础和系统的人才培养导向。

基于数字孪生的液压回路虚拟实验系统

基于智能制造过程中数字孪生技术的应用及新工科人才培养数字孪生实践锻炼需求,探索了沉浸式液压回路虚拟实验数字孪生技术在工程教育中的应用。开发了基于数字学生的液压回路数字孪生系统,通过创建物理实体的精确虚拟孪生模型,并实时同步数据,为学习者提供了一个安全、可控且高度互动的学习环境。系统架构整合了物理实体、数据连接映射与孪生模型,实现了节流调速回路的实时数据采集、存储与三维可视化。通过该实验系统进行实验教学,不仅提升了教学效率,还增强了学生对新工科数字孪生技术的理解,并为学习者提供了全新的学习视角和工具。在提高对液压回路原理理解的同时,锻炼了学生解决实际工程问题的能力,为工程教育的创新与进步提供了新的思路和方法。

实物在环实时仿真教学法研究

新工科背景下,为培养学生创新实践能力,建设国家级一流本科课程,提出了一种新型的适用于电子技术基础课程的教学方法——实物在环实时仿真教学法,应用于北航数字电子技术基础课程。通过口袋仪器和实际硬件进行数字电路设计,可解决虚拟仿真的真实性问题,培养学生解决复杂工程问题的能力;通过虚拟仪器展示波形,使知识难点可视化,有助于学生更快、更深刻理解。实践表明,这种方法取得了良好的教学效果,提高了教学质量。通过该教学方法学生获得了更丰富的学习体验,培养了创新实践能力。

一种集成图像处理功能的数字像元焦平面读出电路

设计了一种像元级数字化焦平面读出电路,克服了传统模拟读出电路技术的电荷容量局限,实现了更大的动态范围和更低噪声的数字化图像读出;同时在像元内部进行数字化图像处理,可实现非均匀校正(NUC)、盲元补偿、数字时间延迟积分(TDI)、空间滤波等图像预处理功能。该电路采用40 nm CMOS工艺流片,面阵规格为640×512,像元步进为30μm,全芯片尺寸约22 mm×19 mm。测试结果显示,该电路通过TDI、空间滤波功能可大幅降低(分别约90%和63%)输出图像空间噪声,提升成像质量。

AIGC、技术异化与劳动者就业焦虑——基于马克思主义政治经济学视角的分析

以ChatGPT为代表的AIGC技术在全世界范围内引起广泛关注。“人工智能的发展带来失业威胁”的劳动者就业焦虑情绪也随着AIGC技术的发明和运用而快速传播。本文从数字生产劳动与AIGC迂回生产链之间的关系切入,指出AIGC迂回生产链中的数据、算法、算力和AIGC技术服务等数字生产资料都是数字劳动者的劳动产物。AIGC技术在转化为现实生产力过程中出现技术异化,这是导致劳动者产生就业焦虑的根源。AIGC技术异化下劳动者就业焦虑要变成现实,需满足数字生产资料私有制的所有制条件、技术服务资本积累的再生产条件和平台资本垄断扩张的市场结构条件。要避免AIGC技术异化下劳动者就业焦虑变成现实,需要在创新数字生产资料公有制实现形式、构建技术进步服务人的自由而全面发展的扩大再生产模式和建立AIGC领域共享性财富积累机制等方面进行经济制度建设的探索。