A small-signal model of current programmed mode pulse width modulation converter including the equivalent sampling effect is introduced and analyzed. In this model, an addition pole is brought out by the sampling effe...A small-signal model of current programmed mode pulse width modulation converter including the equivalent sampling effect is introduced and analyzed. In this model, an addition pole is brought out by the sampling effect in the current loop gain, and it affects dynamic bandwidth and stability of the inner current loop. By selecting the appropriate stability parameter which determines the additional pole and describes the degree of peaking in closed loop transfer function, a control model of current programmed full bridge arc welding inverter with maximum frequency bandwidth and stability can be obtained. Small and large amplitude pulse current outputs are employed in simulations and experiments and results validate the design method.展开更多
A frequency compensation control method for the opposed-piston two-stroke folded-cranktrain( OPFC) diesel engine's common rail system is presented as a result of the study of the loop-shaping theory. A common rail ...A frequency compensation control method for the opposed-piston two-stroke folded-cranktrain( OPFC) diesel engine's common rail system is presented as a result of the study of the loop-shaping theory. A common rail working process and the classical frequency control theory are combined to construct a frequency restriction of common rail pressure. A frequency compensator is utilized to improve the robustness of multiplicative perturbations and disturbance. The loop-shaping method has been applied to design the common rail pressure controller of the OPFC diesel engine. Simulation and bench test results show that in the condition of perturbation that comes from the effect of injection,multi-injection,fuel pumping of a pre-cylinder,and instantaneous pressure fluctuation,the controller indicates high precision. Compared with the original controller,this method improves the control precision by 67. 3%.展开更多
The closed-loop stability issue of finite-precision realizations was investigated for digital control-lers implemented in block-floating-point format. The controller coefficient perturbation was analyzed resultingfrom...The closed-loop stability issue of finite-precision realizations was investigated for digital control-lers implemented in block-floating-point format. The controller coefficient perturbation was analyzed resultingfrom using finite word length (FWL) block-floating-point representation scheme. A block-floating-point FWL closed-loop stability measure was derived which considers both the dynamic range and precision. To facilitate the design of optimal finite-precision controller realizations, a computationally tractable block-floating-point FWL closed-loop stability measure was then introduced and the method of computing the value of this measure for a given controller realization was developed. The optimal controller realization is defined as the solution that maximizes the corresponding measure, and a numerical optimization approach was adopted to solve the resulting optimal realization problem. A numerical example was used to illustrate the design procedure and to compare the optimal controller realization with the initial realization.展开更多
A low jitter All-Digital Phase-Locked Loop (ADPLL) used as a clock generator is designed. The Digital-Controlled Oscillator (DCO) for this ADPLL is a seven-stage ring oscillator with the delay of each stage change...A low jitter All-Digital Phase-Locked Loop (ADPLL) used as a clock generator is designed. The Digital-Controlled Oscillator (DCO) for this ADPLL is a seven-stage ring oscillator with the delay of each stage changeable. Based on the Impulse Sensitivity Function (ISF) analysis, an effective way is proposed to reduce the ADPLL's jitter by the careful design of the sizes of the inverters used in the DCO with a simple architecture other than a complex one. The ADPLL is implemented in a 0.18μm CMOS process with 1.SV supply voltage, occupies 0.046mm^2 of on-chip area. According to the measured results, the ADPLL can operate from 108MHz to 304MHz, and the peak-to-peak jitter is 139ps when the DCO's output frequency is 188MHz.展开更多
This paper presents a novel digital dual-loop control scheme of the PWM(PUlse width modulate)inverter. Deadbeat control technique are employed to enhance the performance. Half switching period delayed sampling and con...This paper presents a novel digital dual-loop control scheme of the PWM(PUlse width modulate)inverter. Deadbeat control technique are employed to enhance the performance. Half switching period delayed sampling and control timing strategy is used to improve the system dynamic response. Simulation and experimental results presented in the paper verified the validity of the proposed control scheme.展开更多
A newly designed pneumatic spring with two separate chambers is promoted and double-loop active control is introduced to overcome the following drawbacks of passive pneumatic isolation: ① The low frequency resonance...A newly designed pneumatic spring with two separate chambers is promoted and double-loop active control is introduced to overcome the following drawbacks of passive pneumatic isolation: ① The low frequency resonances introduced into the system; ② Conflict between lower isolation frequency and stiffness high enough to limit quasi-static stroke;③ Inconsistent isolation level with different force load. The design of two separate chambers is for the purpose of tuning support frequency and force independently and each chamber is controlled by a different valve. The inner one of double-loop structure is pressure control, and in order to obtain good performance, nonlinearities compensation and motion flow rate compensation (MFRC) are added besides the basic cascade compensation, and the influence of tube length is studied. The outer loop has two functions: one is to eliminate the resonance caused by isolation support and to broaden the isolation frequency band by payload velocity feedback and base velocity feed forward, and the other is to tune support force and support stiffness simultaneously and independently, which means the support force will have no effect on support stiffness. Theoretical analysis and experiment results show that the three drawbacks are overcome simultaneously.展开更多
文摘A small-signal model of current programmed mode pulse width modulation converter including the equivalent sampling effect is introduced and analyzed. In this model, an addition pole is brought out by the sampling effect in the current loop gain, and it affects dynamic bandwidth and stability of the inner current loop. By selecting the appropriate stability parameter which determines the additional pole and describes the degree of peaking in closed loop transfer function, a control model of current programmed full bridge arc welding inverter with maximum frequency bandwidth and stability can be obtained. Small and large amplitude pulse current outputs are employed in simulations and experiments and results validate the design method.
基金Supported by the National Natural Science Foundation of China(51406013)
文摘A frequency compensation control method for the opposed-piston two-stroke folded-cranktrain( OPFC) diesel engine's common rail system is presented as a result of the study of the loop-shaping theory. A common rail working process and the classical frequency control theory are combined to construct a frequency restriction of common rail pressure. A frequency compensator is utilized to improve the robustness of multiplicative perturbations and disturbance. The loop-shaping method has been applied to design the common rail pressure controller of the OPFC diesel engine. Simulation and bench test results show that in the condition of perturbation that comes from the effect of injection,multi-injection,fuel pumping of a pre-cylinder,and instantaneous pressure fluctuation,the controller indicates high precision. Compared with the original controller,this method improves the control precision by 67. 3%.
文摘The closed-loop stability issue of finite-precision realizations was investigated for digital control-lers implemented in block-floating-point format. The controller coefficient perturbation was analyzed resultingfrom using finite word length (FWL) block-floating-point representation scheme. A block-floating-point FWL closed-loop stability measure was derived which considers both the dynamic range and precision. To facilitate the design of optimal finite-precision controller realizations, a computationally tractable block-floating-point FWL closed-loop stability measure was then introduced and the method of computing the value of this measure for a given controller realization was developed. The optimal controller realization is defined as the solution that maximizes the corresponding measure, and a numerical optimization approach was adopted to solve the resulting optimal realization problem. A numerical example was used to illustrate the design procedure and to compare the optimal controller realization with the initial realization.
文摘A low jitter All-Digital Phase-Locked Loop (ADPLL) used as a clock generator is designed. The Digital-Controlled Oscillator (DCO) for this ADPLL is a seven-stage ring oscillator with the delay of each stage changeable. Based on the Impulse Sensitivity Function (ISF) analysis, an effective way is proposed to reduce the ADPLL's jitter by the careful design of the sizes of the inverters used in the DCO with a simple architecture other than a complex one. The ADPLL is implemented in a 0.18μm CMOS process with 1.SV supply voltage, occupies 0.046mm^2 of on-chip area. According to the measured results, the ADPLL can operate from 108MHz to 304MHz, and the peak-to-peak jitter is 139ps when the DCO's output frequency is 188MHz.
文摘This paper presents a novel digital dual-loop control scheme of the PWM(PUlse width modulate)inverter. Deadbeat control technique are employed to enhance the performance. Half switching period delayed sampling and control timing strategy is used to improve the system dynamic response. Simulation and experimental results presented in the paper verified the validity of the proposed control scheme.
基金This project is supported by Commission of Science Technology and Industry for National Defense, China.
文摘A newly designed pneumatic spring with two separate chambers is promoted and double-loop active control is introduced to overcome the following drawbacks of passive pneumatic isolation: ① The low frequency resonances introduced into the system; ② Conflict between lower isolation frequency and stiffness high enough to limit quasi-static stroke;③ Inconsistent isolation level with different force load. The design of two separate chambers is for the purpose of tuning support frequency and force independently and each chamber is controlled by a different valve. The inner one of double-loop structure is pressure control, and in order to obtain good performance, nonlinearities compensation and motion flow rate compensation (MFRC) are added besides the basic cascade compensation, and the influence of tube length is studied. The outer loop has two functions: one is to eliminate the resonance caused by isolation support and to broaden the isolation frequency band by payload velocity feedback and base velocity feed forward, and the other is to tune support force and support stiffness simultaneously and independently, which means the support force will have no effect on support stiffness. Theoretical analysis and experiment results show that the three drawbacks are overcome simultaneously.