The sampling rate conversion is always used in order to decrease computational amount and storage load in a system. The fractional Fourier transform （FRFT） is a powerful tool for the analysis of nonstationary signal...The sampling rate conversion is always used in order to decrease computational amount and storage load in a system. The fractional Fourier transform （FRFT） is a powerful tool for the analysis of nonstationary signals, especially, chirp-like signal. Thus, it has become an active area in the signal processing community, with many applications of radar, communication, electronic warfare, and information security. Therefore, it is necessary for us to generalize the theorem for Fourier domain analysis of decimation and interpolation. Firstly, this paper defines the digital frequency in the fractional Fourier domain （FRFD） through the sampling theorems with FRFT. Secondly, FRFD analysis of decimation and interpolation is proposed in this paper with digital frequency in FRFD followed by the studies of interpolation filter and decimation filter in FRFD. Using these results, FRFD analysis of the sampling rate conversion by a rational factor is illustrated. The noble identities of decimation and interpolation in FRFD are then deduced using previous results and the fractional convolution theorem. The proposed theorems in this study are the bases for the generalizations of the multirate signal processing in FRFD, which can advance the filter banks theorems in FRFD. Finally, the theorems introduced in this paper are validated by simulations.展开更多
为了减少数字锁相放大器中的数字信号处理模块在硬件实现时所占用的逻辑资源,采用多抽样率数字信号处理理论来降低被测信号的采样频率,设计了高性能的数字窄带低通滤波器。利用Hogenaur"剪除"理论的级联积分梳状(Cascade Inte...为了减少数字锁相放大器中的数字信号处理模块在硬件实现时所占用的逻辑资源,采用多抽样率数字信号处理理论来降低被测信号的采样频率,设计了高性能的数字窄带低通滤波器。利用Hogenaur"剪除"理论的级联积分梳状(Cascade Integrator Comb,CIC)滤波器,在FPGA实现时不仅能够节省大量的硬件逻辑资源,而且提高了CIC滤波器的最小响应时间;利用内插二阶多项式滤波器(Interpolated Second Order Pofynomials,ISOP)使CIC滤波器通带衰减降低到0.4 dB左右。MATLAB与Modelsim联合仿真测试验证了设计的正确性与可行性。展开更多
A new beamforming method in time-domain is described in this paper. Based on the pipe line architecture, the variable digital filtering algorithm, rising sampling rate (interpolation), down-sampling rate (decimation),...A new beamforming method in time-domain is described in this paper. Based on the pipe line architecture, the variable digital filtering algorithm, rising sampling rate (interpolation), down-sampling rate (decimation), and optimum weighting are combined. The high accuracy time-delay compensation for multi-beam signal processing system is designed by high speed RAM (Random Access Memory) and VLSI (Very Large Scale Integrated) DSP (Digital Signal Processing) chips. Comparing with the traditional beamforming method, the new method presented in this paper is highly accurate, less complex in computation, easy progranunable and have compact hardware architecture. The design philosophy of time-domain RAM-dynamic bearnforming method and hardware implementation is given.展开更多
基金the National Natural Science Foundation of China (Grant Nos.60232010 and 60572094)the National Natural Science Foundation of China for Distinguished Young Scholars (Grant No. 60625104)
文摘The sampling rate conversion is always used in order to decrease computational amount and storage load in a system. The fractional Fourier transform （FRFT） is a powerful tool for the analysis of nonstationary signals, especially, chirp-like signal. Thus, it has become an active area in the signal processing community, with many applications of radar, communication, electronic warfare, and information security. Therefore, it is necessary for us to generalize the theorem for Fourier domain analysis of decimation and interpolation. Firstly, this paper defines the digital frequency in the fractional Fourier domain （FRFD） through the sampling theorems with FRFT. Secondly, FRFD analysis of decimation and interpolation is proposed in this paper with digital frequency in FRFD followed by the studies of interpolation filter and decimation filter in FRFD. Using these results, FRFD analysis of the sampling rate conversion by a rational factor is illustrated. The noble identities of decimation and interpolation in FRFD are then deduced using previous results and the fractional convolution theorem. The proposed theorems in this study are the bases for the generalizations of the multirate signal processing in FRFD, which can advance the filter banks theorems in FRFD. Finally, the theorems introduced in this paper are validated by simulations.
文摘为了减少数字锁相放大器中的数字信号处理模块在硬件实现时所占用的逻辑资源,采用多抽样率数字信号处理理论来降低被测信号的采样频率,设计了高性能的数字窄带低通滤波器。利用Hogenaur"剪除"理论的级联积分梳状(Cascade Integrator Comb,CIC)滤波器,在FPGA实现时不仅能够节省大量的硬件逻辑资源,而且提高了CIC滤波器的最小响应时间;利用内插二阶多项式滤波器(Interpolated Second Order Pofynomials,ISOP)使CIC滤波器通带衰减降低到0.4 dB左右。MATLAB与Modelsim联合仿真测试验证了设计的正确性与可行性。
文摘A new beamforming method in time-domain is described in this paper. Based on the pipe line architecture, the variable digital filtering algorithm, rising sampling rate (interpolation), down-sampling rate (decimation), and optimum weighting are combined. The high accuracy time-delay compensation for multi-beam signal processing system is designed by high speed RAM (Random Access Memory) and VLSI (Very Large Scale Integrated) DSP (Digital Signal Processing) chips. Comparing with the traditional beamforming method, the new method presented in this paper is highly accurate, less complex in computation, easy progranunable and have compact hardware architecture. The design philosophy of time-domain RAM-dynamic bearnforming method and hardware implementation is given.
