Pulse width modulation ( PWM) drive control digitalization is the key for the full digital invert power supply. New ideas are proposed, which are based on field programmable gate array ( FPGA ). First, digital PWM...Pulse width modulation ( PWM) drive control digitalization is the key for the full digital invert power supply. New ideas are proposed, which are based on field programmable gate array ( FPGA ). First, digital PWM principles are discussed. The primary and secondary current characteristics are analyzed when the transformer is in both normal and magnetic bias conditions. Second, two digitalization methods are put forward after the research on PWM adjustment principles, which are based on the primary current feedback. Though the two methods could restrain magnetic bias, their realization is difficult. A new method is researched on double close-loops to overcome the above shortcomings, which uses the secondary current as the feedback signal and the primary current as the protection signal. Finally, the secondary current control made is discussed and realized. Welding experimental results show that the method has strong flexibility and adaptability, which can be used to realize the full digital welding power supply.展开更多
A fuzzy logic intelligent control system of pulsed MAG welding inverter based on digital signal processor (DSP) is proposed to obtain the consistency of arc length in pulsed MAG welding. The proposed control system ...A fuzzy logic intelligent control system of pulsed MAG welding inverter based on digital signal processor (DSP) is proposed to obtain the consistency of arc length in pulsed MAG welding. The proposed control system combines the merits of intelligent control with DSP digital control. The fuzzy logic intelligent control system designed is a typical two-input-single-output structure, and regards the error and the change in error of peak arc voltage as two inputs and the background time as single output. The fuzzy logic intelligent control system is realized in a look-up table (LUT) method by using MATLAB based fuzzy logic toolbox, and the implement of LUT method based on DSP is also discussed. The pulsed MAG welding experimental results demonstrate that the developed fuzzy logic intelligent control system based on DSP has strong arc length controlling ability to accomplish the stable pulsed MAG welding process and controls pulsed MAG welding inverter digitally and intelligently.展开更多
A digital arc welding power supply was designed with the advanced reduced instruction set computer machine (ARM) and embedded real-time multi-task operating system micro C/OS- Ⅱ. The ARM, with its powerful calculat...A digital arc welding power supply was designed with the advanced reduced instruction set computer machine (ARM) and embedded real-time multi-task operating system micro C/OS- Ⅱ. The ARM, with its powerful calculating speed and complete peripheral equipments, is very suitable to work as the controller of the digital power supply. The micro C/OS- Ⅱ transplanted in ARM, helps to improve the respondent speed against various welding signals, as well as the reliability of the controlling software. The welding process consists of nine tasks. The tasks of great significance on reliability of the welder, for example, the A/D conversion of current and voltage, enjoy top priority. To avoid simultaneous-sharing on A/D converter and LCD module, two semaphores are introduced in to ensure the smooth performance of the welding power supply. Proven by experiments ,the ARM and the micro C/OS- Ⅱ can greatly improve both the respondent speed and the reliability of the digital welder.展开更多
A digital control of pulsed gas metal arc welding inverter was proposed. A control system consisting of analogue parts was replaced with a new digital control implemented in a TMS320LF2407A DSP chip. The design and co...A digital control of pulsed gas metal arc welding inverter was proposed. A control system consisting of analogue parts was replaced with a new digital control implemented in a TMS320LF2407A DSP chip. The design and constructional features of the whole digital control were presented. The resources of the DSP chip were efficiently utilized and the circuits are very concise, which can enhance the stability and reliability of welding inverter. Experimental results demonstrate that the developed digital control has the ability to accomplish the excellent pulsed gas metal arc welding process and the merits of the developed digital control are stable welding process, little spatter and perfect weld appearance.展开更多
The hardware and software design of two digital control systems based on 80C196KB MCU for flash butt welder is introduced in this paper.The welding power supply is made of six-phase half-wave rectifier.The welding out...The hardware and software design of two digital control systems based on 80C196KB MCU for flash butt welder is introduced in this paper.The welding power supply is made of six-phase half-wave rectifier.The welding outer characteristic of welding machine is realized by digital PI algorithm with the voltage close-loop feedback.The flashing curve is finished by elec- tric-hydraulic servo valve.The process control system transfers datum with power supply system by a serial communication inter- face.The parameters of the control systems are collected by photoelectrical seclusion to avoid the disturbing of the electromagnetism in welding process.展开更多
A novel inverter power source is developed characterized with constant output current and unit power factor input. Digital signal processor ( DSP ) is used to realize power factor correction and control of back-stag...A novel inverter power source is developed characterized with constant output current and unit power factor input. Digital signal processor ( DSP ) is used to realize power factor correction and control of back-stage inverter bridge of the arc welding inverter. The fore-stage adopts double closed loop proportion and integration (PI) rectifier technique and the back- stage adopts digital pulse width modulation ( PWM) technique. Simulated waves can be obtained in Matlab/Simulink and validated by experiments. Experiments of the prototype showed that the total harmonic distortion (THD) can be controlled within 10% and the power factor is approximate to 1.展开更多
A new type of variable polarity welding power modulated with high-frequency pulse current is developed. Series of high-frequency pulse current is superimposed on direct-current-electrode-negative (DCEN), which can i...A new type of variable polarity welding power modulated with high-frequency pulse current is developed. Series of high-frequency pulse current is superimposed on direct-current-electrode-negative (DCEN), which can improve the crystallization process in the weld bead as a result of the electromagnetic force generated by pulse current. Digital signal processor (DSP) is used to realize the closed-loop control of the first inverter, variable polarity output of the second inverter and high-frequency pulse current superposition.展开更多
With the continuous increasing of circuit scale, the problem of power consumption is paid much more attention than before, especially in large designs. In this paper, an experience of optimizing the power consumption ...With the continuous increasing of circuit scale, the problem of power consumption is paid much more attention than before, especially in large designs. In this paper, an experience of optimizing the power consumption of the 16-bit datapath in a 32-bit reconfigurable pipelined Digital Signal Processor (DSP) is introduced. By keeping the old input values and preventing the useless switching of the logic blocks on the datapath, the power consumption is much lowered. At the same time, by relocating some logic blocks between different pipeline stages and employing some data forward logics, a better balanced pipeline is achieved to lower the power consumption for conditional computation instructions at very low timing and area costs. The effectivity of these power optimization technologies are proved by the experimental results. Finally, some ideas about how to reduce the power consumption of circuits are proposed, which are very effective and useful in practice designs, especially in pipelined ones.展开更多
A novel clock structure of a low-power 16-bit very large instruction word (VLIW) digital signal processor (DSP) was proposed. To improve deterministic clock gating and to solve the drawback of conventional clock gatin...A novel clock structure of a low-power 16-bit very large instruction word (VLIW) digital signal processor (DSP) was proposed. To improve deterministic clock gating and to solve the drawback of conventional clock gating circuit in high speed circuit, a distributed and early clock gating method was developed on its instruction fetch & decoder unit, its pipelined data-path unit and its super-Harvard memory interface unit. The core was implemented following the Synopsys back-end flow under TSMC (Taiwan Silicon manufacture corporation) 0.18-μm 1.8-V 1P6M process, with a core size of 2 mm×2 mm. Result shows that it can run under 200 MHz with a power performance around 0.3 mW/MIPS. Meanwhile, only 39.7% circuit is active simultaneously in average, compared to its non-gating counterparts.展开更多
This paper presents the design and implementation of a low power digital signal processor (THUCIDSP-1 ) targeting at application for cochlear implants. Multi-level low power strategies including algorithm optimizati...This paper presents the design and implementation of a low power digital signal processor (THUCIDSP-1 ) targeting at application for cochlear implants. Multi-level low power strategies including algorithm optimization, operand isolation, clock gating and memory partitioning are adopted in the processor design to reduce the power consumption. Experimental results show that the complexity of the Continuous Interleaved Sampling (CIS) algorithm is reduced by more than 80 % and the power dissipation of the hardware alone is reduced by about 25% with the low power methods. The THUCIDSP-1 prototype, fabricated in 0.18-μm standard CMOS process, consumes only 1.91 mW when executing the CIS algorithm at 3 MHz.展开更多
A kind of pseudo Gray code presentation of test patterns based on accumulation generators is presented and a low power test scheme is proposed to test computational function modules with contiguous subspace in very la...A kind of pseudo Gray code presentation of test patterns based on accumulation generators is presented and a low power test scheme is proposed to test computational function modules with contiguous subspace in very large scale integration (VLSI), especially in digital signal processors (DSP). If test patterns from accumulators for the modules are encoded in the pseudo Gray code presentation, the switching activities of the modules are reduced, and the decrease of the test power consumption is resulted in. Results of experimentation based on FPGA show that the test approach can reduce dynamic power consumption by an average of 17.40% for 8-bit ripple carry adder consisting of 3-2 counters. Then implementation of the low power test in hardware is exploited. Because of the reuse of adders, introduction of additional XOR logic gates is avoided successfully. The design minimizes additional hardware overhead for test and needs no adjustment of circuit structure. The low power test can detect any combinational stuck-at fault within the basic building block without any degradation of original circuit performance.展开更多
The present paper deals with the development of a modular, flexible and structured block to block approach for the study of regulators by implementing the different blocks on a DSP (digital signal processor). The pr...The present paper deals with the development of a modular, flexible and structured block to block approach for the study of regulators by implementing the different blocks on a DSP (digital signal processor). The proposed low-cost approach has been applied and validated by the implementation of an industrial regulator in a real time hardware-in-the-loop simulation of a mixed islanded power network including precise models of the hydraulic system. The studied network is constituted of three different types of electrical power generation systems and a consumer.展开更多
广播电视稳定、可靠、不间断的播出,是一项长期且复杂的任务。数字电视播出是电视台最后一个环节,只有使用先进的技术,采购优质的设备,进行科学的管理,才能够在播出的过程当中达到稳定可靠的要求。以不间断电源(Uninterruptible Power S...广播电视稳定、可靠、不间断的播出,是一项长期且复杂的任务。数字电视播出是电视台最后一个环节,只有使用先进的技术,采购优质的设备,进行科学的管理,才能够在播出的过程当中达到稳定可靠的要求。以不间断电源(Uninterruptible Power Supply,UPS)作为研究对象,探讨了UPS在数字电视信号播出系统中的设计应用,分析了UPS的施工要求,研究了UPS在数字电视信号播出系统中的维护工作。展开更多
文摘Pulse width modulation ( PWM) drive control digitalization is the key for the full digital invert power supply. New ideas are proposed, which are based on field programmable gate array ( FPGA ). First, digital PWM principles are discussed. The primary and secondary current characteristics are analyzed when the transformer is in both normal and magnetic bias conditions. Second, two digitalization methods are put forward after the research on PWM adjustment principles, which are based on the primary current feedback. Though the two methods could restrain magnetic bias, their realization is difficult. A new method is researched on double close-loops to overcome the above shortcomings, which uses the secondary current as the feedback signal and the primary current as the protection signal. Finally, the secondary current control made is discussed and realized. Welding experimental results show that the method has strong flexibility and adaptability, which can be used to realize the full digital welding power supply.
基金supported by National Natural Science Foundation of China(No.50375054)China Postdoctoral Science Foundation (No.20060400745).
文摘A fuzzy logic intelligent control system of pulsed MAG welding inverter based on digital signal processor (DSP) is proposed to obtain the consistency of arc length in pulsed MAG welding. The proposed control system combines the merits of intelligent control with DSP digital control. The fuzzy logic intelligent control system designed is a typical two-input-single-output structure, and regards the error and the change in error of peak arc voltage as two inputs and the background time as single output. The fuzzy logic intelligent control system is realized in a look-up table (LUT) method by using MATLAB based fuzzy logic toolbox, and the implement of LUT method based on DSP is also discussed. The pulsed MAG welding experimental results demonstrate that the developed fuzzy logic intelligent control system based on DSP has strong arc length controlling ability to accomplish the stable pulsed MAG welding process and controls pulsed MAG welding inverter digitally and intelligently.
基金Supported by the National Natural Science Foundation of China under Grant No 50575074by the Scientific and TechnologicalProject of Guangdong Province, China, under Grant No 2003A1040310
文摘A digital arc welding power supply was designed with the advanced reduced instruction set computer machine (ARM) and embedded real-time multi-task operating system micro C/OS- Ⅱ. The ARM, with its powerful calculating speed and complete peripheral equipments, is very suitable to work as the controller of the digital power supply. The micro C/OS- Ⅱ transplanted in ARM, helps to improve the respondent speed against various welding signals, as well as the reliability of the controlling software. The welding process consists of nine tasks. The tasks of great significance on reliability of the welder, for example, the A/D conversion of current and voltage, enjoy top priority. To avoid simultaneous-sharing on A/D converter and LCD module, two semaphores are introduced in to ensure the smooth performance of the welding power supply. Proven by experiments ,the ARM and the micro C/OS- Ⅱ can greatly improve both the respondent speed and the reliability of the digital welder.
基金Supported by National Natural Science Foundation of China ( No50375054)China Postdoctoral Science Foundation ( No20060400745)
文摘A digital control of pulsed gas metal arc welding inverter was proposed. A control system consisting of analogue parts was replaced with a new digital control implemented in a TMS320LF2407A DSP chip. The design and constructional features of the whole digital control were presented. The resources of the DSP chip were efficiently utilized and the circuits are very concise, which can enhance the stability and reliability of welding inverter. Experimental results demonstrate that the developed digital control has the ability to accomplish the excellent pulsed gas metal arc welding process and the merits of the developed digital control are stable welding process, little spatter and perfect weld appearance.
文摘The hardware and software design of two digital control systems based on 80C196KB MCU for flash butt welder is introduced in this paper.The welding power supply is made of six-phase half-wave rectifier.The welding outer characteristic of welding machine is realized by digital PI algorithm with the voltage close-loop feedback.The flashing curve is finished by elec- tric-hydraulic servo valve.The process control system transfers datum with power supply system by a serial communication inter- face.The parameters of the control systems are collected by photoelectrical seclusion to avoid the disturbing of the electromagnetism in welding process.
文摘A novel inverter power source is developed characterized with constant output current and unit power factor input. Digital signal processor ( DSP ) is used to realize power factor correction and control of back-stage inverter bridge of the arc welding inverter. The fore-stage adopts double closed loop proportion and integration (PI) rectifier technique and the back- stage adopts digital pulse width modulation ( PWM) technique. Simulated waves can be obtained in Matlab/Simulink and validated by experiments. Experiments of the prototype showed that the total harmonic distortion (THD) can be controlled within 10% and the power factor is approximate to 1.
文摘A new type of variable polarity welding power modulated with high-frequency pulse current is developed. Series of high-frequency pulse current is superimposed on direct-current-electrode-negative (DCEN), which can improve the crystallization process in the weld bead as a result of the electromagnetic force generated by pulse current. Digital signal processor (DSP) is used to realize the closed-loop control of the first inverter, variable polarity output of the second inverter and high-frequency pulse current superposition.
文摘With the continuous increasing of circuit scale, the problem of power consumption is paid much more attention than before, especially in large designs. In this paper, an experience of optimizing the power consumption of the 16-bit datapath in a 32-bit reconfigurable pipelined Digital Signal Processor (DSP) is introduced. By keeping the old input values and preventing the useless switching of the logic blocks on the datapath, the power consumption is much lowered. At the same time, by relocating some logic blocks between different pipeline stages and employing some data forward logics, a better balanced pipeline is achieved to lower the power consumption for conditional computation instructions at very low timing and area costs. The effectivity of these power optimization technologies are proved by the experimental results. Finally, some ideas about how to reduce the power consumption of circuits are proposed, which are very effective and useful in practice designs, especially in pipelined ones.
基金The Research Project of China Military Department (No6130325)
文摘A novel clock structure of a low-power 16-bit very large instruction word (VLIW) digital signal processor (DSP) was proposed. To improve deterministic clock gating and to solve the drawback of conventional clock gating circuit in high speed circuit, a distributed and early clock gating method was developed on its instruction fetch & decoder unit, its pipelined data-path unit and its super-Harvard memory interface unit. The core was implemented following the Synopsys back-end flow under TSMC (Taiwan Silicon manufacture corporation) 0.18-μm 1.8-V 1P6M process, with a core size of 2 mm×2 mm. Result shows that it can run under 200 MHz with a power performance around 0.3 mW/MIPS. Meanwhile, only 39.7% circuit is active simultaneously in average, compared to its non-gating counterparts.
基金Supported by the National Natural Science Foundation of China (No. 60475018)
文摘This paper presents the design and implementation of a low power digital signal processor (THUCIDSP-1 ) targeting at application for cochlear implants. Multi-level low power strategies including algorithm optimization, operand isolation, clock gating and memory partitioning are adopted in the processor design to reduce the power consumption. Experimental results show that the complexity of the Continuous Interleaved Sampling (CIS) algorithm is reduced by more than 80 % and the power dissipation of the hardware alone is reduced by about 25% with the low power methods. The THUCIDSP-1 prototype, fabricated in 0.18-μm standard CMOS process, consumes only 1.91 mW when executing the CIS algorithm at 3 MHz.
基金supported by the National Natural Science Foundation of China under Grant No.90407007University Science Foundation of China under Grant No R0820207
文摘A kind of pseudo Gray code presentation of test patterns based on accumulation generators is presented and a low power test scheme is proposed to test computational function modules with contiguous subspace in very large scale integration (VLSI), especially in digital signal processors (DSP). If test patterns from accumulators for the modules are encoded in the pseudo Gray code presentation, the switching activities of the modules are reduced, and the decrease of the test power consumption is resulted in. Results of experimentation based on FPGA show that the test approach can reduce dynamic power consumption by an average of 17.40% for 8-bit ripple carry adder consisting of 3-2 counters. Then implementation of the low power test in hardware is exploited. Because of the reuse of adders, introduction of additional XOR logic gates is avoided successfully. The design minimizes additional hardware overhead for test and needs no adjustment of circuit structure. The low power test can detect any combinational stuck-at fault within the basic building block without any degradation of original circuit performance.
文摘The present paper deals with the development of a modular, flexible and structured block to block approach for the study of regulators by implementing the different blocks on a DSP (digital signal processor). The proposed low-cost approach has been applied and validated by the implementation of an industrial regulator in a real time hardware-in-the-loop simulation of a mixed islanded power network including precise models of the hydraulic system. The studied network is constituted of three different types of electrical power generation systems and a consumer.
文摘广播电视稳定、可靠、不间断的播出,是一项长期且复杂的任务。数字电视播出是电视台最后一个环节,只有使用先进的技术,采购优质的设备,进行科学的管理,才能够在播出的过程当中达到稳定可靠的要求。以不间断电源(Uninterruptible Power Supply,UPS)作为研究对象,探讨了UPS在数字电视信号播出系统中的设计应用,分析了UPS的施工要求,研究了UPS在数字电视信号播出系统中的维护工作。