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Simulation and Design Optimization of Novel Microelectromechanical Digital-to-Analog Converter
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作者 刘清惓 黄庆安 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2001年第12期1543-1545,共3页
A microelectromechanical Digital to Analog Converter (DAC) based on Weighted Gap (WG) principle is described,which is analogous to the weighed resistor DAC in electronic circuits.To convert the input of binary vol... A microelectromechanical Digital to Analog Converter (DAC) based on Weighted Gap (WG) principle is described,which is analogous to the weighed resistor DAC in electronic circuits.To convert the input of binary voltage to the output of analog displacement,the gaps are proposed to be employed as a scale factor.A finite element method is used to simulate the performance of the DAC.To reduce the error,the structure design is optimized and the maximum error of 0 002μm is obtained. 展开更多
关键词 digital to analog converter MEMS microactuators precise positioning FEA
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A survey of high-speed high-resolution current steering DACs 被引量:1
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作者 Xing Li Lei Zhou 《Journal of Semiconductors》 EI CAS CSCD 2020年第11期41-51,共11页
Digital to analog converters(DAC)play an important role as a bridge connecting the analog world and the digital world.With the rapid development of wireless communication,wideband digital radar,and other emerging tech... Digital to analog converters(DAC)play an important role as a bridge connecting the analog world and the digital world.With the rapid development of wireless communication,wideband digital radar,and other emerging technologies,better performing high-speed high-resolution DACs are required.In those applications,signal bandwidth and high-frequency linearity often limited by data converters are the bottleneck of the system.This article reviews the state-of-the-art technologies of high-speed and high-resolution DACs reported in recent years.Comparisons are made between different architectures,circuit implementations and calibration techniques along with the figure of merit(FoM)results. 展开更多
关键词 digital to analog converters high-speed high-resolution current steering
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A 14-bit 500-MS/s DAC with digital background calibration 被引量:1
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作者 徐震 李学清 +3 位作者 刘嘉男 魏琦 骆丽 杨华中 《Journal of Semiconductors》 EI CAS CSCD 2014年第3期152-157,共6页
Thelinearityofcurrent-steeringdigital-to-analogconverters(DACs)atlowsignalfrequenciesismainly limited by matching properties of current sources, so large-size current source arrays are widely used for better matchin... Thelinearityofcurrent-steeringdigital-to-analogconverters(DACs)atlowsignalfrequenciesismainly limited by matching properties of current sources, so large-size current source arrays are widely used for better matching. This, however, results in large gradient errors and parasitic capacitance, which degrade the spurious free dynamic range(SFDR) for high-frequency signals. To overcome this problem, calibration is an effective method.In this paper, a digital background calibration technique for current-steering DACs is presented and verified by a 14-bit DAC in a 0.13 m standard CMOS process. The measured differential nonlinearity(DNL) and integral nonlinearity(INL) are 0.4 LSB and 1.2 LSB, respectively. At 500-MS/s, the SFDR is 70 dB and 50.3 dB for signals of 5.4 MHz and 224 MHz, respectively. The core area is 0.69 mm2and the power consumption is 165 mW from a mixed power supply with 1.2 V and 3.3 V. 展开更多
关键词 digital to analog converter(DAC) current-steering digital background calibration
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Simulink Behavioral Modeling of a 10-bit Pipelined ADC 被引量:1
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作者 Samir Barra Souhil Kouda +1 位作者 Abdelghani Dendouga N. E. Bouguechal 《International Journal of Automation and computing》 EI CSCD 2013年第2期134-142,共9页
The increasing architecture complexity of data converters makes it necessary to use behavioral models to simulate their electrical performance and to determine their relevant data features. For this purpose, a specifi... The increasing architecture complexity of data converters makes it necessary to use behavioral models to simulate their electrical performance and to determine their relevant data features. For this purpose, a specific data converter simulation environment has been developed which allows designers to perform time-domain behavioral simulations of pipelined analog to digital converters (ADCs). All the necessary blocks of this specific simulation environment have been implemented using the popular Matlab simulink environment. The purpose of this paper is to present the behavioral models of these blocks taking into account most of the pipelined ADC non-idealities, such as sampling jitter, noise, and operational amplifier parameters (white noise, finite DC gain, finite bandwidth, slew rate, and saturation voltages). Simulations, using a 10-bit pipelined ADC as a design example, show that in addition to the limits analysis and the electrical features extraction, designers can determine the specifications of the basic blocks in order to meet the given data converter requirements. 展开更多
关键词 Behavioral modeling analog to digital converters (ADCs) pipelined ADC multiple digital to analog converter (MDAC) sample and hold (S/H)
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