In this paper, on-chip interconnects are modeled as distributed parameter RLCG transmission lines, based on which the matrix ABCD of interconnects is deduced. With help of the ABCD matrix, a voltage transfer function ...In this paper, on-chip interconnects are modeled as distributed parameter RLCG transmission lines, based on which the matrix ABCD of interconnects is deduced. With help of the ABCD matrix, a voltage transfer function of an interconnect system, consisting of a driver, interconnect line and load, is obtained analytically in the form of a transcendental function, and it is reduced to a finite order system based on high order Pade approximation. With the reduced-order transfer function, response waveforms with step input can be obtained, and signal delay can be calculated consequently. Two numerical experiments are conducted to demonstrate its efficiency.展开更多
A uniform wire segmentation algorithm for performance optimization of distributed RLC interconnects was proposed in this paper. The optimal wire length for identical segments and buffer size for buffer inser-tion are ...A uniform wire segmentation algorithm for performance optimization of distributed RLC interconnects was proposed in this paper. The optimal wire length for identical segments and buffer size for buffer inser-tion are obtained through computation and derivation, based on a 2-pole approximatian model of distribut-ed RLC interconnect. For typical inductance value and long wires under 180nm technology, experiments show that the uniform wire segmentation technique proposed in the paper can reduce delay by about 27%～56%, while requires 34%～69% less total buffer usage and thus 29% to 58% less power consump-tion. It is suitable for long RLC interconnect performance optimization.展开更多
基金supported by the National Natural Science Foundation of China (No.60574082)
文摘In this paper, on-chip interconnects are modeled as distributed parameter RLCG transmission lines, based on which the matrix ABCD of interconnects is deduced. With help of the ABCD matrix, a voltage transfer function of an interconnect system, consisting of a driver, interconnect line and load, is obtained analytically in the form of a transcendental function, and it is reduced to a finite order system based on high order Pade approximation. With the reduced-order transfer function, response waveforms with step input can be obtained, and signal delay can be calculated consequently. Two numerical experiments are conducted to demonstrate its efficiency.
文摘A uniform wire segmentation algorithm for performance optimization of distributed RLC interconnects was proposed in this paper. The optimal wire length for identical segments and buffer size for buffer inser-tion are obtained through computation and derivation, based on a 2-pole approximatian model of distribut-ed RLC interconnect. For typical inductance value and long wires under 180nm technology, experiments show that the uniform wire segmentation technique proposed in the paper can reduce delay by about 27%～56%, while requires 34%～69% less total buffer usage and thus 29% to 58% less power consump-tion. It is suitable for long RLC interconnect performance optimization.
