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MOS Capacitance-Voltage Characteristics Ⅱ.Sensitivity of Electronic Trapping at Dopant Impurity from Parameter Variations 被引量:1
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作者 揭斌斌 薩支唐 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2011年第12期1-11,共11页
Low-frequency and high-frequency Capacitance-Voltage (C-V) curves of Metal-Oxide- Semiconductor Capacitors (MOSC), including electron and hole trapping at the dopant donor and acceptor impurities, are presented to... Low-frequency and high-frequency Capacitance-Voltage (C-V) curves of Metal-Oxide- Semiconductor Capacitors (MOSC), including electron and hole trapping at the dopant donor and acceptor impurities, are presented to illustrate giant trapping capacitances, from 〉 0.01Cox to 〉 10Cox. Five device and materials parameters are varied for fundamental trapping parameter characterization, and electrical and optical signal processing applications. Parameters include spatially constant concentration of the dopant-donor-impurity electron trap, NDD, the ground state electron trapping energy level depth measured from the conduction band edge, Ec - ED, the degeneracy of the trapped electron at the ground state, gD, the device temperature, T, and the gate oxide thickness, xox. 展开更多
关键词 trapping capacitance donor dopant impurity electron trap MOS
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MOS Capacitance-Voltage Characteristics:Ⅳ.Trapping Capacitance from 3-Charge-State Impurities
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作者 Jie Binbin Sah Chihtang 《Journal of Semiconductors》 EI CAS CSCD 2012年第1期1-19,共19页
Metal-Oxide-Semiconductor Capacitance-Voltage (MOSCV) characteristics containing giant carrier trapping capacitances from 3-charge-state or 2-energy-level impurities are presented for not-doped, n-doped, p- doped an... Metal-Oxide-Semiconductor Capacitance-Voltage (MOSCV) characteristics containing giant carrier trapping capacitances from 3-charge-state or 2-energy-level impurities are presented for not-doped, n-doped, p- doped and compensated silicon containing the double-donor sulfur and iron, the double-acceptor zinc, and the amphoteric or one-donor and one-acceptor gold and silver impurities. These impurities provide giant trapping ca- pacitances at trapping energies from 200 to 800 meV (50 to 200 THz and 6 to 1.5 μm), which suggest potential sub-millimeter, far-infrared and spin electronics applications. 展开更多
关键词 multiple charge states trapping capacitance dopant impurity
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MOS Capacitance-Voltage Characteristics Ⅲ.Trapping Capacitance from 2-Charge-State Impurities
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作者 揭斌斌 薩支唐 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2011年第12期12-27,共16页
Low-frequency and high-frequency capacitance-voltage curves of Metal-Oxide-Semiconductor Capacitors are presented to illustrate giant electron and hole trapping capacitances at many simultaneously present two-charge-s... Low-frequency and high-frequency capacitance-voltage curves of Metal-Oxide-Semiconductor Capacitors are presented to illustrate giant electron and hole trapping capacitances at many simultaneously present two-charge-state and one-trapped-carrier, or one-energy-level impurity species. Models described include a donor electron trap and an acceptor hole trap, both donors, both acceptors, both shallow energy levels, both deep, one shallow and one deep, and the identical donor and acceptor. Device and material parameters are selected to simu- late chemically and physically realizable capacitors for fundamental trapping parameter characterizations and for electrical and optical signal processing applications. 展开更多
关键词 MOS silicon trapping capacitance dopant impurities donors ACCEPTORS
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MOS Capacitance-Voltage Characteristics:V.Methods to Enhance the Trapping Capacitance
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作者 Jie Binbin Sah Chihtang 《Journal of Semiconductors》 EI CAS CSCD 2012年第2期1-9,共9页
Low-frequency and High-frequency Capacitance-Voltage(C-V) curves of Silicon Metal-Oxide-Semiconductor Capacitors,showing electron and hole trapping at shallow-level dopant and deep-level generation-recombination -tr... Low-frequency and High-frequency Capacitance-Voltage(C-V) curves of Silicon Metal-Oxide-Semiconductor Capacitors,showing electron and hole trapping at shallow-level dopant and deep-level generation-recombination -trapping impurities,are presented to illustrate the enhancement of the giant trapping capacitances by physical means via device and circuit designs,in contrast to chemical means via impurity characteristics previously reported.Enhancement is realized by masking the electron or/and hole storage capacitances to make the trapping capacitances dominant at the terminals.Device and materials properties used in the computed CV curves are selected to illustrate experimental realizations for fundamental trapping parameter characterizations and for electrical and optical signal processing applications. 展开更多
关键词 MOS silicon trapping capacitance dopant impurities DONORS ACCEPTORS
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