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A FAULT DETECTION SENSOR FOR CIRCUIT AGING USING DOUBLE-EDGE-TRIGGERED FLIP-FLOP 被引量:1
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作者 Yan Luming Liang Huaguo +1 位作者 Huang Zhengfeng Liu Yanbin 《Journal of Electronics(China)》 2013年第1期97-103,共7页
In nanoscale technology, transistor aging is one of the most critical problems that impact on the reliability of circuits. Aging sensor is a good online way to detect the circuit aging, which performs during the opera... In nanoscale technology, transistor aging is one of the most critical problems that impact on the reliability of circuits. Aging sensor is a good online way to detect the circuit aging, which performs during the operating time with no influence of the normal operation of circuits. In this paper, a Dou- ble-edge-triggered Detection Sensor for circuit Aging (DSDA) is proposed, which employs data signal of logic circuits as its clock to control the sampling process. The simulation is done by Hspice using 45 nm technology. The results show that this technique is not case of the detection precision is more than 80% under aging fault effectively with the 8% power cost and 30% sensitive to the process variations. The worst the different process variations. It can detect performance cost. 展开更多
关键词 Circuit aging Fault detection SENSOR double-edge-triggered Flip-Flop (DETFF)
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An ultra-high-speed direct digital frequency synthesizer implemented in GaAs HBT technology
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作者 陈高鹏 吴旦昱 +1 位作者 金智 刘新宇 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2010年第6期83-87,共5页
This paper presents a 10-GHz 8-bit direct digital synthesizer(DDS) microwave monolithic integrated circuit implemented in 1μm GaAs HBT technology.The DDS takes a double-edge-trigger(DET) 8-stage pipeline accumula... This paper presents a 10-GHz 8-bit direct digital synthesizer(DDS) microwave monolithic integrated circuit implemented in 1μm GaAs HBT technology.The DDS takes a double-edge-trigger(DET) 8-stage pipeline accumulator with sine-weighted DAC-based ROM-less architecture,which can maximize the utilization ratio of the GaAs HBT's high-speed potential.With an output frequency up to 5 GHz,the DDS gives an average spurious free dynamic range of 23.24 dBc through the first Nyquist band,and consumes 2.4 W of DC power from a single-4.6 VDC supply.Using 1651 GaAs HBT transistors,the total area of the DDS chip is 2.4×2.0 mm^2. 展开更多
关键词 DDS double-edge-trigger CML ECL GaAs HBT sine-weighted DAC
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