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A New Low Voltage RF CMOS Mixer Design
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作者 刘璐 王志华 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2005年第5期877-880,共4页
A new architecture of CMOS low voltage downconve rsion mixer is presented.With 1.452GHz LO input and 1.45GHz RF input,simulation results show that the conversion gain is 15dB,IIP3 is -4.5dBm,NF is 17dB,the maximum tra... A new architecture of CMOS low voltage downconve rsion mixer is presented.With 1.452GHz LO input and 1.45GHz RF input,simulation results show that the conversion gain is 15dB,IIP3 is -4.5dBm,NF is 17dB,the maximum transient power dissipation is 9.3mW,and DC power dissipation is 9.2mW.The mixer’s noise and linearity analyses are also presented. 展开更多
关键词 downconversion mixer CMOS process noise and linearity analysis
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