A novel silicon-on-insulator（SOI） high breakdown voltage（BV） power device with interlaced dielectric trenches（IDT） and N/P pillars is proposed. In the studied structure, the drift region is folded by IDT embedde...A novel silicon-on-insulator（SOI） high breakdown voltage（BV） power device with interlaced dielectric trenches（IDT） and N/P pillars is proposed. In the studied structure, the drift region is folded by IDT embedded in the active layer,which results in an increase of length of ionization integral remarkably. The crowding phenomenon of electric field in the corner of IDT is relieved by the N/P pillars. Both traits improve two key factors of BV, the ionization integral length and electric field magnitude, and thus BV is significantly enhanced. The electric field in the dielectric layer is enhanced and a major portion of bias is borne by the oxide layer due to the accumulation of inverse charges（holes） at the corner of IDT.The average value of the lateral electric field of the proposed device reaches 60 V/μm with a 10 μm drift length, which increases by 200% in comparison to the conventional SOI LDMOS, resulting in a breakdown voltage of 607 V.展开更多
A new high-voltage LDMOS with folded drift region （FDR LDMOS） is proposed. The drift region is folded by introducing the interdigital oxide layer in the： Si active layer, the result of which is that the effective l...A new high-voltage LDMOS with folded drift region （FDR LDMOS） is proposed. The drift region is folded by introducing the interdigital oxide layer in the： Si active layer, the result of which is that the effective length of the drift region is increased significantly. The breakdown characteristic has been improved by the shielding effect of the electric field from the holes accumulated in the surface of the device and the buried oxide layer. The numerical results indicate that the breakdown voltage of 700 V is obtained in the proposed device in comparison to 300 V of conventional LDMOS, while maintaining low on-resistance.展开更多
为了快速适应非平稳环境中工业数据流的分布变化,需要在非结构化和噪声干扰的数据中准确、实时的完成概念漂移的检测.本文提出了一种基于多元区域集划分的工业数据流概念漂移检测算法(Concept Drift detection-Multivariate region set ...为了快速适应非平稳环境中工业数据流的分布变化,需要在非结构化和噪声干扰的数据中准确、实时的完成概念漂移的检测.本文提出了一种基于多元区域集划分的工业数据流概念漂移检测算法(Concept Drift detection-Multivariate region set Partition,CDMP).首先基于实例模糊密度进行多元区域集划分,根据划分的若干模糊分区集合,识别概念漂移发生的区域.概念漂移的持续发生会显著降低基于多元区域集构建的模型的分类性能,CDMP通过构建多元历史模型池来保留具有多样性的历史模型,以降低模型调整或再训练造成的性能损耗,同时保证概念漂移检测中准确性.CDMP在不同数据集上进行了性能测试.实验结果表明,CDMP实现了对历史模型多样性的保留和重用,能够在不同噪声水平的工业物联网环境中实现对重现型、突发型等多类型概念漂移的准确检测.展开更多
基金Project supported by the Guangxi Natural Science Foundation of China(Grant Nos.2013GXNSFAA019335 and 2015GXNSFAA139300)Guangxi Experiment Center of Information Science of China(Grant No.YB1406)+2 种基金Guangxi Key Laboratory of Wireless Wideband Communication and Signal Processing of China,Key Laboratory of Cognitive Radio and Information Processing(Grant No.GXKL061505)Guangxi Key Laboratory of Automobile Components and Vehicle Technology of China(Grant No.2014KFMS04)the National Natural Science Foundation of China(Grant Nos.61361011,61274077,and 61464003)
文摘A novel silicon-on-insulator（SOI） high breakdown voltage（BV） power device with interlaced dielectric trenches（IDT） and N/P pillars is proposed. In the studied structure, the drift region is folded by IDT embedded in the active layer,which results in an increase of length of ionization integral remarkably. The crowding phenomenon of electric field in the corner of IDT is relieved by the N/P pillars. Both traits improve two key factors of BV, the ionization integral length and electric field magnitude, and thus BV is significantly enhanced. The electric field in the dielectric layer is enhanced and a major portion of bias is borne by the oxide layer due to the accumulation of inverse charges（holes） at the corner of IDT.The average value of the lateral electric field of the proposed device reaches 60 V/μm with a 10 μm drift length, which increases by 200% in comparison to the conventional SOI LDMOS, resulting in a breakdown voltage of 607 V.
基金Project supported by the State Key Laboratory of Electronic Thin Films and Integrated Devices,UESTC(No.KFJJ201205)the Guangxi Department of Education(No.201202ZD041)+1 种基金the China Postdoctoral Science Foundation(Nos.2012M521127,2013T60566)the National Natural Science Foundation of China(Nos.61361011,61274077,61464003)
文摘A new high-voltage LDMOS with folded drift region （FDR LDMOS） is proposed. The drift region is folded by introducing the interdigital oxide layer in the： Si active layer, the result of which is that the effective length of the drift region is increased significantly. The breakdown characteristic has been improved by the shielding effect of the electric field from the holes accumulated in the surface of the device and the buried oxide layer. The numerical results indicate that the breakdown voltage of 700 V is obtained in the proposed device in comparison to 300 V of conventional LDMOS, while maintaining low on-resistance.
文摘为了快速适应非平稳环境中工业数据流的分布变化,需要在非结构化和噪声干扰的数据中准确、实时的完成概念漂移的检测.本文提出了一种基于多元区域集划分的工业数据流概念漂移检测算法(Concept Drift detection-Multivariate region set Partition,CDMP).首先基于实例模糊密度进行多元区域集划分,根据划分的若干模糊分区集合,识别概念漂移发生的区域.概念漂移的持续发生会显著降低基于多元区域集构建的模型的分类性能,CDMP通过构建多元历史模型池来保留具有多样性的历史模型,以降低模型调整或再训练造成的性能损耗,同时保证概念漂移检测中准确性.CDMP在不同数据集上进行了性能测试.实验结果表明,CDMP实现了对历史模型多样性的保留和重用,能够在不同噪声水平的工业物联网环境中实现对重现型、突发型等多类型概念漂移的准确检测.
