Electromagnetic Simulation with 3D FEM for Design Automation in 5G Era

Electromagnetic simulation and electronic design automation(EDA)play an important role in the design of 5G antennas and radio chips.The simulation challenges include electromagnetic effects and long simulation time and this paper focuses on simulation software based on finite-element method(FEM).The state-of-the-art EDA software using novel computational techniques based on FEM can not only accelerate numerical analysis,but also enable optimization,sensitivity analysis and interactive design tuning based on rigorous electromagnetic model of a device.Several new techniques that help to mitigate the most challenging issues related to FEM based simulation are highlighted.In particular,methods for fast frequency sweep,mesh morphing and surrogate models for efficient optimization and manual design tuning are briefly described,and their efficiency is illustrated on examples involving a 5G multiple-input multiple-output(MIMO)antenna and filter.It is demonstrated that these new computational techniques enable significant reduction of time needed for design closure with the acceleration rates as large as tens or even over one hundred.

DYNAMIC LABELING BASED FPGA DELAY OPTIMIZATION ALGORITHM

DAG-MAP is an FPGA technology mapping algorithm for delay optimization and the labeling phase is the algorithm’s kernel. This paper studied the labeling phase and presented an improved labeling method. It is shown through the experimental results on MCNC benchmarks that the improved method is more effective than the original method while the computation time is almost the same.

Technological Exploration of RRAM Crossbar Array for Matrix-Vector Multiplication

Matrix-vector multiplication is the key operation for many computationally intensive algorithms. The emerging metal oxide resistive switching random access memory （RRAM） device and RRAM crossbar array have demonstrated a promising hardware realization of the analog matrix-vector multiplication with ultra-high energy efficiency. In this paper, we analyze the impact of both device level and circuit level non-ideal factors, including the nonlinear current-voltage relationship of RRAM devices, the variation of device fabrication and write operation, and the interconnect resistance as well as other crossbar array parameters. On top of that, we propose a technological exploration flow for device parameter configuration to overcome the impact of non-ideal factors and achieve a better trade-off among performance, energy, and reliability for each specific application. Our simulation results of a support vector machine （SVM） and Mixed National Institute of Standards and Technology （MNIST） pattern recognition dataset show that RRAM crossbar array based SVM is robust to input signal fluctuation but sensitive to tunneling gap deviation. A further resistance resolution test presents that a 6-bit RRAM device is able to realize a recognition accuracy around 90%, indicating the physical feasibility of RRAM crossbar array based SVM. In addition, the proposed technological exploration flow is able to achieve 10.98% improvement of recognition accuracy on the MNIST dataset and 26.4% energy savings compared with previous work. Experimental results also show that more than 84.4% power saving can be achieved at the cost of little accuracy reduction.

New Multipole Method for 3-D Capacitance Extraction

This paper describes an efficient improvement of the multipole accelerated boundary element method for 3-D capacitance extraction. The overall relations between the positions of 2-D boundary elements are considered instead of only the relations between the center-points of the elements, and a new method of cube partitioning is introduced. Numerical results are presented to demonstrate that the method is accurate and has nearly linear computational growth as O(n), where n is the number of panels/boundary elements. The proposed method is more accurate and much faster than Fastcap.

Pulse control of frequency and width for a real-time independently adjustable laser source

A set of semiconductor laser pulse seed sources based on an embedded chip is proposed.The greatest feature is that the optical pulse frequency and width can be independently adjusted in real time.The pulse seed sources can be switched independently and online from the gain-switched mode to the quasi-continuous wave mode to obtain optimal optical parameters for specific applications.To explore the physical mechanism of the semiconductor laser source,the rate equation that describes the carrier-photon transient change in a semiconductor laser cavity is numerically derived and solved.Subsequently,problems that need to be considered while designing the drive circuit are identified.The system evaluation indicates that the optical pulse frequency adjustment range is 250 Hz to 42 MHz,and the narrowest optical pulse output width is 80 ps.The pulse seed source can drive semiconductor lasers with different central wavelengths(1064,1550,and 1970 nm),and can also simultaneously drive two semiconductor lasers and output dual-band optical pulses.It can be used as a seed source for general high-power optical systems,and exhibits good application value and extensive market prospects.