The electrostatic discharge(ESD)protection circuit widely exists in the input and output ports of CMOS digital circuits,and fast rising time electromagnetic pulse(FREMP)coupled into the device not only interacts with ...The electrostatic discharge(ESD)protection circuit widely exists in the input and output ports of CMOS digital circuits,and fast rising time electromagnetic pulse(FREMP)coupled into the device not only interacts with the CMOS circuit,but also acts on the protection circuit.This paper establishes a model of on-chip CMOS electrostatic discharge protection circuit and selects square pulse as the FREMP signals.Based on multiple physical parameter models,it depicts the distribution of the lattice temperature,current density,and electric field intensity inside the device.At the same time,this paper explores the changes of the internal devices in the circuit under the injection of fast rising time electromagnetic pulse and describes the relationship between the damage amplitude threshold and the pulse width.The results show that the ESD protection circuit has potential damage risk,and the injection of FREMP leads to irreversible heat loss inside the circuit.In addition,pulse signals with different attributes will change the damage threshold of the circuit.These results provide an important reference for further evaluation of the influence of electromagnetic environment on the chip,which is helpful to carry out the reliability enhancement research of ESD protection circuit.展开更多
Electrostatic discharge(ESD)event usually destroys the electrical properties of dielectric films,resulting in product failure.In this work,the breakdown characteristic of machine mode(MM)ESD on three different nano si...Electrostatic discharge(ESD)event usually destroys the electrical properties of dielectric films,resulting in product failure.In this work,the breakdown characteristic of machine mode(MM)ESD on three different nano size films of head gimble assemble are obtained experimentally.The breakdown voltage and thickness parameters show a positive proportional relationship,but they are generally very low and have large discrete characteristics(~30%).The maximum and minimum breakdown voltages of the tested samples are 1.08 V and 0.46 V,which are far lower than the requirement of the current standard(25 V).In addition,the judgment criterion of product damage is given,and the relationship between discharge voltage polarity,initial resistance and breakdown voltage is studied.Finally,the theoretical analysis of the breakdown characteristic law has been given.展开更多
A robust electron device called the enhanced gated-diode-triggered silicon-controlled rectifier (EGDTSCR) for electrostatic discharge (ESD) protection applications has been proposed and implemented in a 0.18-μm 5-V/2...A robust electron device called the enhanced gated-diode-triggered silicon-controlled rectifier (EGDTSCR) for electrostatic discharge (ESD) protection applications has been proposed and implemented in a 0.18-μm 5-V/24-V BCD process. The proposed EGDTSCR is constructed by adding two gated diodes into a conventional ESD device called the modified lateral silicon-controlled rectifier (MLSCR). With the shunting effect of the surface gated diode path, the proposed EGDTSCR, with a width of 50 μm, exhibits a higher failure current (i.e., 3.82 A) as well as a higher holding voltage (i.e., 10.21 V) than the MLSCR.展开更多
A novel diode string-triggered gated-Pi N junction device, which is fabricated in a standard 65-nm complementary metal-oxide semiconductor（CMOS） technology, is proposed in this paper. An embedded gated-Pi N junction...A novel diode string-triggered gated-Pi N junction device, which is fabricated in a standard 65-nm complementary metal-oxide semiconductor（CMOS） technology, is proposed in this paper. An embedded gated-Pi N junction structure is employed to reduce the diode string leakage current to 13 n A/μm in a temperature range from 25°C to 85°C. To provide the effective electrostatic discharge（ESD） protection in multi-voltage power supply, the triggering voltage of the novel device can be adjusted through redistributing parasitic resistance instead of changing the stacked diode number.展开更多
The comprehensive understanding of the structure-dependent electrostatic discharge behaviors in a conventional diode-triggered silicon controlled rectifier （DTSCR） is presented in this paper. Combined with the devic...The comprehensive understanding of the structure-dependent electrostatic discharge behaviors in a conventional diode-triggered silicon controlled rectifier （DTSCR） is presented in this paper. Combined with the device simulation, a mathematical model is built to get a more in-depth insight into this phenomenon. The theoretical studies are verified by the transmission-line-pulsing （TLP） test results of the modified DTSCR structure, which is realized in a 65-nm complementary metal-oxide-semiconductor （CMOS） process. The detailed analysis of the physical mechanism is used to provide predictions as the DTSCR-based protection scheme is required. In addition, a method is also presented to achieve the tradeoff between the leakage and trigger voltage in DTSCR.展开更多
Characteristic measurement of contact discharge currents are made through a hand-held metal rod from charged human body. Correlation coefficients are obtained, through Statistic Package for Social Science (SPSS), for ...Characteristic measurement of contact discharge currents are made through a hand-held metal rod from charged human body. Correlation coefficients are obtained, through Statistic Package for Social Science (SPSS), for various charge voltages, which is based on the effect test of electrode contact approach speeds on discharge current parameters of current peaks, maximum rising slope and spark lengths. Discharge parameters at charge voltage 300V are independent on approach speed. For charge voltages equal to and higher than 500V, the contact approach speed has strong positive cor- relation with discharge parameters of the peak current and the maximum rising slope, whereas has strong negative correlation with the spark length.展开更多
基金National Natural Science Foundation of China(61974116)。
文摘The electrostatic discharge(ESD)protection circuit widely exists in the input and output ports of CMOS digital circuits,and fast rising time electromagnetic pulse(FREMP)coupled into the device not only interacts with the CMOS circuit,but also acts on the protection circuit.This paper establishes a model of on-chip CMOS electrostatic discharge protection circuit and selects square pulse as the FREMP signals.Based on multiple physical parameter models,it depicts the distribution of the lattice temperature,current density,and electric field intensity inside the device.At the same time,this paper explores the changes of the internal devices in the circuit under the injection of fast rising time electromagnetic pulse and describes the relationship between the damage amplitude threshold and the pulse width.The results show that the ESD protection circuit has potential damage risk,and the injection of FREMP leads to irreversible heat loss inside the circuit.In addition,pulse signals with different attributes will change the damage threshold of the circuit.These results provide an important reference for further evaluation of the influence of electromagnetic environment on the chip,which is helpful to carry out the reliability enhancement research of ESD protection circuit.
文摘Electrostatic discharge(ESD)event usually destroys the electrical properties of dielectric films,resulting in product failure.In this work,the breakdown characteristic of machine mode(MM)ESD on three different nano size films of head gimble assemble are obtained experimentally.The breakdown voltage and thickness parameters show a positive proportional relationship,but they are generally very low and have large discrete characteristics(~30%).The maximum and minimum breakdown voltages of the tested samples are 1.08 V and 0.46 V,which are far lower than the requirement of the current standard(25 V).In addition,the judgment criterion of product damage is given,and the relationship between discharge voltage polarity,initial resistance and breakdown voltage is studied.Finally,the theoretical analysis of the breakdown characteristic law has been given.
基金Project supported by the National Natural Science Foundation of China(Grant Nos.61874098 and 61974017)the Fundamental Research Project for Central Universities,China(Grant No.ZYGX2018J025).
文摘A robust electron device called the enhanced gated-diode-triggered silicon-controlled rectifier (EGDTSCR) for electrostatic discharge (ESD) protection applications has been proposed and implemented in a 0.18-μm 5-V/24-V BCD process. The proposed EGDTSCR is constructed by adding two gated diodes into a conventional ESD device called the modified lateral silicon-controlled rectifier (MLSCR). With the shunting effect of the surface gated diode path, the proposed EGDTSCR, with a width of 50 μm, exhibits a higher failure current (i.e., 3.82 A) as well as a higher holding voltage (i.e., 10.21 V) than the MLSCR.
基金Project supported by the National Basic Research Program of China(Grant No.2011CBA00606)
文摘A novel diode string-triggered gated-Pi N junction device, which is fabricated in a standard 65-nm complementary metal-oxide semiconductor（CMOS） technology, is proposed in this paper. An embedded gated-Pi N junction structure is employed to reduce the diode string leakage current to 13 n A/μm in a temperature range from 25°C to 85°C. To provide the effective electrostatic discharge（ESD） protection in multi-voltage power supply, the triggering voltage of the novel device can be adjusted through redistributing parasitic resistance instead of changing the stacked diode number.
基金Project supported by the Beijing Municipal Natural Science Foundation,China(Grant No.4162030)the National Science and Technology Major Project of China(Grant No.2013ZX02303002)
文摘The comprehensive understanding of the structure-dependent electrostatic discharge behaviors in a conventional diode-triggered silicon controlled rectifier （DTSCR） is presented in this paper. Combined with the device simulation, a mathematical model is built to get a more in-depth insight into this phenomenon. The theoretical studies are verified by the transmission-line-pulsing （TLP） test results of the modified DTSCR structure, which is realized in a 65-nm complementary metal-oxide-semiconductor （CMOS） process. The detailed analysis of the physical mechanism is used to provide predictions as the DTSCR-based protection scheme is required. In addition, a method is also presented to achieve the tradeoff between the leakage and trigger voltage in DTSCR.
基金Supported by the National Natural Science Foundation of China (No.60473021)
文摘Characteristic measurement of contact discharge currents are made through a hand-held metal rod from charged human body. Correlation coefficients are obtained, through Statistic Package for Social Science (SPSS), for various charge voltages, which is based on the effect test of electrode contact approach speeds on discharge current parameters of current peaks, maximum rising slope and spark lengths. Discharge parameters at charge voltage 300V are independent on approach speed. For charge voltages equal to and higher than 500V, the contact approach speed has strong positive cor- relation with discharge parameters of the peak current and the maximum rising slope, whereas has strong negative correlation with the spark length.
