Investigation of performance-enhanced GaN-based E-mode pchannel MOSFET with pre-ohmic-annealing treatment

Pre-ohmic-annealing(POA)treatment of P-GaN/AlN/AlGaN epitaxy under N_(2)atmosphere was demonstrated to effectively achieve good p-type ohmic contact as well as decreased epitaxy sheet resistance.Ohmic contact resistance(Rc)extracted by transfer length method reduced from 38 to 23Ω·mm with alleviated contact barrier height from 0.55 to 0.51 eV after POA treatment.X-ray photoelectron spectroscopy and Hall measurement confirmed that POA treatment was able to reduce surface state density and improve the hole concentration of p-GaN.Due to the decreased Rc and improved two-dimensional hole gas(2DHG)density,an outstanding-performance GaN E-mode p-channel MOSFET was successfully realized.

Recess-free enhancement-mode AlGaN/GaN RF HEMTs on Si substrate

Enhancement-mode(E-mode)GaN-on-Si radio-frequency(RF)high-electron-mobility transistors(HEMTs)were fabri-cated on an ultrathin-barrier(UTB)AlGaN(<6 nm)/GaN heterostructure featuring a naturally depleted 2-D electron gas(2DEG)channel.The fabricated E-mode HEMTs exhibit a relatively high threshold voltage(VTH)of+1.1 V with good uniformity.A maxi-mum current/power gain cut-off frequency(fT/fMAX)of 31.3/99.6 GHz with a power added efficiency(PAE)of 52.47%and an out-put power density(Pout)of 1.0 W/mm at 3.5 GHz were achieved on the fabricated E-mode HEMTs with 1-μm gate and Au-free ohmic contact.

Abstraction of Small Signal Equivalent Circuit Parameters of Enhancement-Mode InGaP/AlGaAs/InGaAs PHEMT

An extraction method of the component parameter values of an enhancement-mode InGaP/AIGaAs/In-GaAs PHEMT small signal equivalent circuit is presented,and these component parameter values are extracted by using the EEHEMT1 model of IC-CAP software. The extraction results are verified by ADS software,and the DC I-V curves and S parameters simulated by ADS are basically accordant with those of the test results. These results indicate that the EEHEMT1 model can be used for extracting the component parameters of an enhancement-mode PHEMT.

Gate Annealing of an Enhancement-Mode InGaP/AlGaAs/InGaAs PHEMT

For enhancement-mode InGaP/A1GaAs/InGaAs PHEMTs,gate annealing is conducted between gate structures of Ti/Pt/Au and Pt/Ti/Pt/Au. Comparison is made after thermal annealing and an optimum annealing process is ob- tained. Using the structure of Ti/Pt/Au, about a 200mV positive shift of threshold voltage is achieved by thermal annea- ling at 320℃ for 40min in N2 ambient. Finally, a stable and consistent enhancement-mode PHEMT is produced successfully with higher threshold voltage.

High-performance enhancement-mode GaN-based p-FETs fabricated with O_(3)-Al_(2)O_(3)/HfO_(2)-stacked gate dielectric

In this letter,an enhancement-mode(E-mode)GaN p-channel field-effect transistor(p-FET)with a high current den-sity of−4.9 mA/mm based on a O_(3)-Al_(2)O_(3)/HfO_(2)(5/15 nm)stacked gate dielectric was demonstrated on a p++-GaN/p-GaN/AlN/AlGaN/AlN/GaN/Si heterostructure.Attributed to the p++-GaN capping layer,a good linear ohmic I−V characteristic fea-turing a low-contact resistivity(ρc)of 1.34×10^(−4)Ω·cm^(2) was obtained.High gate leakage associated with the HfO_(2)high-k gate dielectric was effectively blocked by the 5-nm O_(3)-Al_(2)O_(3)insertion layer grown by atomic layer deposition,contributing to a high ION/IOFF ratio of 6×10^(6)and a remarkably reduced subthreshold swing(SS)in the fabricated p-FETs.The proposed structure is compelling for energy-efficient GaN complementary logic(CL)circuits.

Degradation mechanism of enhancement-mode AlGaN/GaN HEMTs using fluorine ion implantation under the on-state gate overdrive stress

The degradation mechanism of enhancement-mode Al Ga N/Ga N high electron mobility transistors（HEMTs） fabricated by fluorine plasma ion implantation technology is one major concern of HEMT＇s reliability. It is observed that the threshold voltage shows a significant negative shift during the typical long-term on-state gate overdrive stress. The degradation does not originate from the presence of as-grown traps in the Al Ga N barrier layer or the generated traps during fluorine ion implantation process. By comparing the relationships between the shift of threshold voltage and the cumulative injected electrons under different stress conditions, a good agreement is observed. It provides direct experimental evidence to support the impact ionization physical model, in which the degradation of E-mode HEMTs under gate overdrive stress can be explained by the ionization of fluorine ions in the Al Ga N barrier layer by electrons injected from 2DEG channel.Furthermore, our results show that there are few new traps generated in the Al Ga N barrier layer during the gate overdrive stress, and the ionized fluorine ions cannot recapture the electrons.

Influence of ^(60)Co gamma radiation on fluorine plasma treated enhancement-mode high-electron-mobility transistor

A1GaN/GaN depletion-mode high-electron-mobility transistor （D-HEMT） and fluorine （F） plasma treated enhancement-mode high-electron-mobility transistor （E-HEMT） are exposed to 60Co gamma radiation with a dose of 1.6 Mrad （Si）. No degradation is observed in the performance of D-HEMT. However, the maximum transeonductance of E-HEMT is increased after radiation. The 2DEG density and the mobility are calculated from the results of capacitance-voltage measurement. The electron mobility decreases after fluorine plasma treatment and recovers after radiation. Conductance measurements in a frequency range from 10 kHz to 1 MHz are used to characterize the trapping effects in the devices. A new type of trap is observed in the F plasma treated E-HEMT compared with the D-HEMT, but the density of the trap decreases by radiation. Fitting of Gp/w data yields the trap densities DT = （1-3）Х1012 cm^-2.eV^-1 and DT = （0,2-0.8）Х10^12 cm^2-eV^-1 before and after radiation, respectively. The time constant is 0.5 ms-6 ms. With F plasma treatment, the trap is introduced by etch damage and degrades the electronic mobility. After 60Co gamma radiation, the etch damage decreases and the electron mobility is improved. The gamma radiation can recover the etch damage caused by F plasma treatment.

High threshold voltage enhancement-mode GaN p-FET with Sirich LPCVD SiN_(x) gate insulator for high hole mobility

In this work,the GaN p-MISFET with LPCVD-SiN_(x) is studied as a gate dielectric to improve device performance.By changing the Si/N stoichiometry of SiN_(x),it is found that the channel hole mobility can be effectively enhanced with Si-rich SiN_(x) gate dielectric,which leads to a respectably improved drive current of GaN p-FET.The record high channel mobility of 19.4 cm2/(V∙s)was achieved in the device featuring an Enhancement-mode channel.Benefiting from the significantly improved channel mobility,the fabricated E-mode GaN p-MISFET is capable of delivering a decent-high current of 1.6 mA/mm,while simultaneously featuring a negative threshold-voltage(VTH)of–2.3 V(defining at a stringent criteria of 10μA/mm).The device also exhibits a well pinch-off at 0 V with low leakage current of 1 nA/mm.This suggests that a decent E-mode operation of the fabricated p-FET is obtained.In addition,the VTH shows excellent stability,while the threshold-voltage hysteresisΔVTH is as small as 0.1 V for a gate voltage swing up to–10 V,which is among the best results reported in the literature.The results indicate that optimizing the Si/N stoichiometry of LPCVD-SiN_(x) is a promising approach to improve the device performance of GaN p-MISFET.

Study of enhancement-mode GaN pFET with H plasma treated gate recess

This letter showcases the successful fabrication of an enhancement-mode(E-mode)buried p-channel GaN fieldeffect-transistor on a standard p-GaN/AlGaN/GaN-on-Si power HEMT substrate.The transistor exhibits a threshold voltage(VTH)of−3.8 V,a maximum ON-state current(ION)of 1.12 mA/mm,and an impressive ION/IOFF ratio of 10^(7).To achieve these remarkable results,an H plasma treatment was strategically applied to the gated p-GaN region,where a relatively thick GaN layer(i.e.,70 nm)was kept intact without aggressive gate recess.Through this treatment,the top portion of the GaN layer was converted to be hole-free,leaving only the bottom portion p-type and spatially separated from the etched GaN surface and gateoxide/GaN interface.This approach allows for E-mode operation while retaining high-quality p-channel characteristics.

Investigation of AlGaN/GaN fluorine plasma treatment enhancement-mode high electronic mobility transistors by frequency-dependent capacitance and conductance analysis

This paper reports fluorine plasma treatment enhancement-mode HEMTs （high electronic mobility transistors） EHEMTs and conventional depletion-mode HEMTs DHEMTs fabricated on one wafer using separate litho-photography technology. It finds that fluorine plasma etches the AlGaN at a slow rate by capacitance-voltage measurement. Using capacitance-frequency measurement, it finds one type of trap in conventional DHEMTs with TT = （0.5 - 6） ms and DT ： （1 - 5）×10^13 cm^-2. eV^-1. Two types of trap are found in fluorine plasma treatment EHEMTs, fast with TW（f）= （0.2 - 2） μs and slow with TT（s） = （0.5 - 6） ms. The density of trap states evaluated on the EHEMTs is Dw（f） ： （1 - 3） × 10^12 cm^-2. eV^-1 and DT（s） =（2 - 6） × 10^12 cm-2. eV-1 for the fast and slow traps, respectively. The result shows that the fluorine plasma treatment reduces the slow trap density by about one order, but introduces a new type of fast trap. The slow trap is suggested to be a surface trap, related to the gate leakage current.

The effects of ^(60)Co γ-ray irradiation on the DC characteristics of enhancement-mode AlGaN/GaN high-electron-mobility transistors

The effects of ^60Co γ-ray irradiation on the DC characteristics of AlGaN/GaN enhancement-mode high-electron- mobility transistors （E-mode HEMTs） are investigated. The results show that having been irradiated by^60Co γ-rays at a dose of 3 Mrad （Si）, the E-mode HEMT reduces its saturation drain current and maximal transconductance by 6% and 5%, respectively, and significantly increases both forward and reverse gate currents, while its threshold voltage is affected only slightly. The obvious performance degradation of E-mode A1GaN/GaN HEMTs is consistent with the creation of electronegative surface state charges in the source-gate spacer and gate-drain spacer after being irradiated.

Study on a novel vertical enhancement-mode Ga_(2)O_(3) MOSFET with FINFET structure

A novel enhanced mode(E-mode)Ga_(2)O_(3) metal-oxide-semiconductor field-effect transistor(MOSFET)with vertical FINFET structure is proposed and the characteristics of that device are numerically investigated.It is found that the concentration of the source region and the width coupled with the height of the channel mainly effect the on-state characteristics.The metal material of the gate,the oxide material,the oxide thickness,and the epitaxial layer concentration strongly affect the threshold voltage and the output currents.Enabling an E-mode MOSFET device requires a large work function gate metal and an oxide with large dielectric constant.When the output current density of the device increases,the source concentration,the thickness of the epitaxial layer,and the total width of the device need to be expanded.The threshold voltage decreases with the increase of the width of the channel area under the same gate voltage.It is indicated that a set of optimal parameters of a practical vertical enhancement-mode Ga_(2)O_(3) MOSFET requires the epitaxial layer concentration,the channel height of the device,the thickness of the source region,and the oxide thickness of the device should be less than 5×10^(16) cm^(-3),less than 1.5μm,between 0.1μm-0.3μm and less than 0.08μm,respectively.

Non-recessed-gate quasi-E-mode double heterojunction AlGaN/GaN high electron mobility transistor with high breakdown voltage

A non-recessed-gate quasi-E-mode double heterojunction A1GaN/GaN high electron mobility transistor （quasi-E- DHEMT） with a thin barrier, high breakdown voltage and good performance of drain induced barrier lowering （DIBL） was presented. Due to the metal organic chemical vapor deposition （MOCVD） grown 9-nm undoped A1GaN barrier, the effect that the gate metal depleted the two-dimensiomal electron gas （2DEG） was greatly impressed. Therefore, the density of carriers in the channel was nearly zero. Hence, the threshold voltage was above 0 V. Quasi-E-DHEMT with 4.1%tm source-to-drain distance, 2.6-μm gate-to-drain distance, and 0.5-μm gate length showed a drain current of 260 mA/mm. The threshold voltage of this device was 0.165 V when the drain voltage was 10 V and the DIBL was 5.26 mV/V. The quasi-E-DHEMT drain leakage current at a drain voltage of 146 V and a gate voltage of -6 V was below 1 mA/mm. This indicated that the hard breakdown voltage was more than 146 V.

Groove-type channel enhancement-mode Al GaN/GaN MIS HEMT with combined polar and nonpolar AlGaN/GaN heterostructures

A novel groove-type channel enhancement-mode AlGaN/GaN MIS high electron mobility transistor（GTCE-HEMT）with a combined polar and nonpolar AlGaN/GaN heterostucture is presented. The device simulation shows a threshold voltage of 1.24 V, peak transconductance of 182 m S/mm, and subthreshold slope of 85 m V/dec, which are obtained by adjusting the device parameters. Interestingly, it is possible to control the threshold voltage accurately without precisely controlling the etching depth in fabrication by adopting this structure. Besides, the breakdown voltage（VB） is significantly increased by 78% in comparison with the value of the conventional MIS-HEMT. Moreover, the fabrication process of the novel device is entirely compatible with that of the conventional depletion-mode（D-mode） polar AlGaN/GaN HEMT. It presents a promising way to realize the switch application and the E/D-mode logic circuits.

High-performance InAlGaN/GaN enhancement-mode MOS-HEMTs grown by pulsed metal organic chemical vapor deposition

Pulsed metal organic chemical vapor deposition was employed to grow nearly polarization matched InAlGaN/GaN heterostructures. A relatively low sheet carrier density of 1.8×10^(12)cm^(-2), together with a high electron mobility of1229.5 cm^2/V·s, was obtained for the prepared heterostructures. The surface morphology of the heterostructures was also significantly improved, i.e., with a root mean square roughness of 0.29 nm in a 2 μm×2 μm scan area. In addition to the improved properties, the enhancement-mode metal–oxide–semiconductor high electron mobility transistors(MOSHEMTs) processed on the heterostructures not only exhibited a high threshold voltage(VTH) of 3.1 V, but also demonstrated a significantly enhanced drain output current density of 669 m A/mm. These values probably represent the largest values obtained from the InAlGaN based enhancement-mode devices to the best of our knowledge. This study strongly indicates that the InAlGaN/GaN heterostructures grown by pulsed metal organic chemical vapor deposition could be promising for the applications of novel nitride-based electronic devices.

High-frequency enhancement-mode millimeterwave AlGaN/GaN HEMT with an fT/fmax over 100 GHz/200 GHz

Ultra-thin barrier(UTB) 4-nm-Al Ga N/Ga N normally-off high electron mobility transistors(HEMTs) having a high current gain cut-off frequency( fT) are demonstrated by the stress-engineered compressive Si N trench technology.The compressive in-situ Si N guarantees the UTB-Al Ga N/Ga N heterostructure can operate a high electron density of1.27×1013 cm-2, a high uniform sheet resistance of 312.8 Ω/, but a negative threshold for the short-gate devices fabricated on it. With the lateral stress-engineering by full removing in-situ Si N in the 600-nm Si N trench, the short-gated(70 nm) devices obtain a threshold of 0.2 V, achieving the devices operating at enhancement-mode(E-mode). Meanwhile,the novel device also can operate a large current of 610 m A/mm and a high transconductance of 394 m S/mm for the Emode devices. Most of all, a high fT/fmax of 128 GHz/255 GHz is obtained, which is the highest value among the reported E-mode Al Ga N/Ga N HEMTs. Besides, being together with the 211 GHz/346 GHz of fT/fmax for the D-mode HEMTs fabricated on the same materials, this design of E/D-mode with the realization of fmax over 200 GHz in this work is the first one that can be used in Q-band mixed-signal application with further optimization. And the minimized processing difference between the E-and D-mode designs the addition of the Si N trench, will promise an enormous competitive advantage in the fabricating costs.

An Improved Active Miller Clamp Crosstalk Suppression Method for Enhancement-Mode GaN HEMTs in Phase-Leg Configuration

When using traditional drive circuits,the enhancement-mode GaN(eGaN)HEMT will be affected by high switching speed characteristics and parasitic parameters leading to worse crosstalk problems.Currently,the existing crosstalk suppression drive circuits often have the disadvantages of increased switching loss,control complexity,and overall electromagnetic interference(EMI).Therefore,this paper combines the driving loop impedance control and the active Miller clamp method to propose an improved active Miller clamp drive circuit.First,the crosstalk mechanism is analyzed,and the crosstalk voltage model is established.Through the crosstalk voltage evaluation platform,the influencing factors are evaluated experimentally.Then,the operating principle of the improved active Miller clamp drive circuit is discussed,and the optimized parameter design method is given.Finally,the effect of the improved active Miller clamp method for suppressing crosstalk is experimentally verified.The crosstalk voltage was suppressed from 3.5 V and-3.5 V to 1 V and-1.3 V,respectively,by the improved circuit.

Thin-barrier enhancement-mode AlGaN/GaN MIS-HEMT using ALD Al_2O_3 as gate insulator

A high-performance enhancement-mode （E-mode） gallium nitride （GaN）-based metal-insulator- semiconductor high electron mobility transistor （MIS-HEMT） that employs a 5-nm-thick aluminum gallium nitride （Al0.3Ga0.7N） as a barrier layer and relies on silicon nitride （SIN） passivation to control the 2DEG density is presented. Unlike the SiN passivation, aluminum oxide （AL2O3） by atomic layer deposition （ALD） on A1GaN surface would not increase the 2DEG density in the heterointerface. ALD AL2O3 was used as gate insulator after the depletion by etching of the SiN in the gate region. The E-mode MIS-HEMT with gate length （LG） of 1 μm showed a maximum drain current density （IDs） of 657 mA/mm, a maximum extrinsic transconductance （gin） of 187 mS/ram and a threshold voltage （Vth） of 1 V. Comparing with the corresponding E-mode HEMT, the device performances had been greatly improved due to the insertion of AL2O3 gate insulator. This provided an excellent way to realize E-mode A1GaN/GaN MIS-HEMTs with both high Vth and IDS.

Monolithic Integration of InGaP/AlGaAs/InGaAs Enhancement/Depletion-Mode PHEMTs

The monolithic integration of enhancement- and depletion-mode （E/D-mode） InGaP/AIGaAs/InGaAs pseudomorphic high electron mobility transistors （PHEMTs） with a 1.0μm gate length is presented. Epilayers are grown on SI GaAs substrates using MBE. For this structure, a mobility of 5410cm^2/（V · s） and a sheet density of 1.34 × 10^12 cm^-2 are achieved at room temperature. During the gate fabrication of E/D-mode PHEMTs,a novel twostep technology is applied. The devices with a gate dimension of 1μm × 100μm exhibit good DC and RF performances. Threshold voltages of 0. 2 and -0. 4V,maximum drain current densities of 300 and 340mA/mm,and extrinsic transconductances of 350 and 300mS/mm for E- and D-mode PHEMTs are obtained, respectively. The reverse gatedrain breakdown voltage is -14V for both E- and D-mode. Current-gain cutoff frequencies of 10. 3 and 12.4GHz and power-gain cutoff frequencies of 12.8 and 14.7GHz for E- and D-mode are reported, respectively.

Static characteristics and short channel effect in enhancement-mode AlN/GaN/AlN N-polar MISFET with self-aligned source/drain regions

This paper aims to simulate the I–V static characteristic of the enhancement-mode（E-mode） Npolar GaN metal–insulator–semiconductor field effect transistor（MISFET） with self-aligned source/drain regions.Firstly, with SILVACO TCAD device simulation, the drain–source current as a function of the gate–source voltage is calculated and the dependence of the drain–source current on the drain–source voltage in the case of different gate–source voltages for the device with a 0.62 m gate length is investigated. Secondly, a comparison is made with the experimental report. Lastly, the transfer characteristic with different gate lengths and different buffer layers has been performed. The results show that the simulation is in accord with the experiment at the gate length of 0.62 m and the short channel effect becomes pronounced as gate length decreases. The E-mode will not be held below a100 nm gate length unless both transversal scaling and vertical scaling are being carried out simultaneously.