Static Random Access Memory(SRAM) based Field Programmable Gate Array(FPGA) is widely applied in the field of aerospace, whose anti-SEU(Single Event Upset) capability becomes more and more important. To improve anti-F...Static Random Access Memory(SRAM) based Field Programmable Gate Array(FPGA) is widely applied in the field of aerospace, whose anti-SEU(Single Event Upset) capability becomes more and more important. To improve anti-FPGA SEU capability, the registers of the circuit netlist are tripled and divided into three categories in this study. By the packing algorithm, the registers of triple modular redundancy are loaded into different configurable logic block. At the same time, the packing algorithm considers the effect of large fan-out nets. The experimental results show that the algorithm successfully realize the packing of the register of Triple Modular Redundancy(TMR). Comparing with Timing Versatile PACKing(TVPACK), the algorithm in this study is able to obtain a 11% reduction of the number of the nets in critical path, and a 12% reduction of the time delay in critical path on average when TMR is not considered. Especially, some critical path delay of circuit can be improved about 33%.展开更多
5G时代的到来将通信系统的工作频段推入毫米波波段,这给毫米波器件的封装带来了挑战.5G系统需要将射频、模拟、数字功能和无源器件以及其他系统组件集成在一个封装模块中,这个要求恰恰体现了异质异构集成的特征.在所有的异质异构集成解...5G时代的到来将通信系统的工作频段推入毫米波波段,这给毫米波器件的封装带来了挑战.5G系统需要将射频、模拟、数字功能和无源器件以及其他系统组件集成在一个封装模块中,这个要求恰恰体现了异质异构集成的特征.在所有的异质异构集成解决方案中,2.5D/3D系统级封装(System in Package,SiP)因其高度集成化被视为解决5G系统封装的重要突破口.文章以SiP为切入口,着重介绍了未来5G封装发展重点的2.5D/3D SiP技术以及目前备受瞩目的Chiplet技术.基于5G毫米波器件的系统级封装解决方案,探讨了适用于毫米波器件封装的基板材料以及SiP所需的先进封装技术.最后,针对5G天线模块的封装,介绍了片上天线和封装天线两种解决方案.展开更多
基金Supported by the National Natural Science Foundation of China(No.61106033)
文摘Static Random Access Memory(SRAM) based Field Programmable Gate Array(FPGA) is widely applied in the field of aerospace, whose anti-SEU(Single Event Upset) capability becomes more and more important. To improve anti-FPGA SEU capability, the registers of the circuit netlist are tripled and divided into three categories in this study. By the packing algorithm, the registers of triple modular redundancy are loaded into different configurable logic block. At the same time, the packing algorithm considers the effect of large fan-out nets. The experimental results show that the algorithm successfully realize the packing of the register of Triple Modular Redundancy(TMR). Comparing with Timing Versatile PACKing(TVPACK), the algorithm in this study is able to obtain a 11% reduction of the number of the nets in critical path, and a 12% reduction of the time delay in critical path on average when TMR is not considered. Especially, some critical path delay of circuit can be improved about 33%.
文摘5G时代的到来将通信系统的工作频段推入毫米波波段,这给毫米波器件的封装带来了挑战.5G系统需要将射频、模拟、数字功能和无源器件以及其他系统组件集成在一个封装模块中,这个要求恰恰体现了异质异构集成的特征.在所有的异质异构集成解决方案中,2.5D/3D系统级封装(System in Package,SiP)因其高度集成化被视为解决5G系统封装的重要突破口.文章以SiP为切入口,着重介绍了未来5G封装发展重点的2.5D/3D SiP技术以及目前备受瞩目的Chiplet技术.基于5G毫米波器件的系统级封装解决方案,探讨了适用于毫米波器件封装的基板材料以及SiP所需的先进封装技术.最后,针对5G天线模块的封装,介绍了片上天线和封装天线两种解决方案.
