In the ultra-thin relaxed SiGe virtual substrates, a strained-Si channel p-type Metal Oxide Semiconductor Field Effect Transistor (p-MOSFET) is presented. Built on strained-Si/240nm relaxed-Si0.8 Ge0.2/ 100nm Low Temp...In the ultra-thin relaxed SiGe virtual substrates, a strained-Si channel p-type Metal Oxide Semiconductor Field Effect Transistor (p-MOSFET) is presented. Built on strained-Si/240nm relaxed-Si0.8 Ge0.2/ 100nm Low Temperature Si (LT-Si)/10nm Si buffer was grown by Molecular Beam Epitaxy (MBE), in which LT-Si layer is used to release stress of the SiGe layer and made it relaxed. Measurement indicates that the strained-Si p-MOSFET's (L=4.2μm) transconductance and the hole mobility are enhanced 30% and 50% respectively, compared with that of conventional bulk-Si. The maximum hole mobility for strained-Si device is 140cm2/Vs. The device performance is comparable to devices achieved on several μm thick composition graded buffers and relaxed-SiGe layer virtual substrates.展开更多
One-dimensional(1D)semiconductor nanostructures exhibit exceptional performance in mitigating short-channel effects and ensuring low power consumption.However,the scarcity of high-mobility ptype 1D materials impedes f...One-dimensional(1D)semiconductor nanostructures exhibit exceptional performance in mitigating short-channel effects and ensuring low power consumption.However,the scarcity of high-mobility ptype 1D materials impedes further advancement.Molecular-based materials offer high designability in structure and properties,making them a promising candidate for 1D p-type semiconductor materials.A molecular-based 1D p-type material was developed under the guidance of coordination chemistry.Cu-HT(HT is the abbreviation of p-hydroxy thiophenol)combines the merits of highly orbital overlap between Cu and S,fully covered surface modification with phenol functional groups,and unique cuprophilic(Cu-Cu)interactions.As such,Cu-HT has a remarkable hole mobility of 27.2 cm2V-1s-1,which is one of the highest reported values for 1D molecular-based materials to date and even surpass those of commonly used amorphous silicon as well as the majority of 1D inorganic materials.This achievement underscores the significant potential of coordination polymers in optimizing carrier transport and represents a major advancement in the synthesis of high-performance,1D p-type semiconductor materials.?2024 Science China Press.Published by Elsevier B.V.and Science China Press.All rights are reserved.展开更多
Solution-processed n-type organic semiconductor micro/nanocrystals （OSMCs） are fundamental elements for developing low-cost, large-area, and all organic logic/complementary circuits. However, the development of air-...Solution-processed n-type organic semiconductor micro/nanocrystals （OSMCs） are fundamental elements for developing low-cost, large-area, and all organic logic/complementary circuits. However, the development of air-stable, highly aligned n-channel OSMC arrays for realizing high-performance devices lags far behind their p-channel counterparts. Herein, we present a simple one-step slope-coating method for the large-scale, solution-processed fabrication of highly aligned, air-stable, n-channel ribbon-shaped single-crystalline N,N＇-bis（2- phenylethyl）-perylene-3,4：9,10-tetracarboxylic diimide （BPE-PTCDI） arrays. The slope and pattemed photoresist （PR） stripes on the substrate are found to be crucial for the formation of large-area submicron ribbon arrays. The width and thickness of the BPE-PTCDI submicron ribbons can be finely tuned by controlling the solution concentration as well as the slope angle. The resulting BPE-PTCDI submicron ribbon arrays possess an optimum electron mobility up to 2.67 cm2.V-l.s-1 （with an average mobility of 1.13 cm2.V-l-s-1）, which is remarkably higher than that of thin film counterparts and better than the performance reported previously for single-crystalline BPE-PTCDI-based devices. Moreover, the devices exhibit robust air stability and remain stable after exposing in air over 50 days. Our study facilitates the development of air-stable, n-channel organic field-effect transistors （OFETs） and paves the way towards the fabrication of high-performance, organic single crystal-based integrated circuits.展开更多
Flexible magnetoelectric （ME） materials have been studied for new applications such as memory, energy harvesters, and magnetic field sensors. Herein, with the widely studied and progressive advantages of ME phenomen...Flexible magnetoelectric （ME） materials have been studied for new applications such as memory, energy harvesters, and magnetic field sensors. Herein, with the widely studied and progressive advantages of ME phenomena in the multiferroic field, we demonstrate a new approach for utilizing flexible ME materials as gate dielectric layers in ME organic field-effect transistors （ME-OFET） that can be used for sensing a magnetic field and extracting the ME properties of the gate dielectric itself. The magnetoelectric nanohybrid gate dielectric layer comprises sandwiched stacks of magnetostrictive CoFe2O4 nanoparticles and a highly piezoelectric poly（vinylidene fluoride-co-trifluoroethylene） layer. While varying the magnetic field applied to the ME gate dielectric, the ME effect in the functional gate dielectric modulates the channel conductance of the ME-OFET owing to a change in the effective gate field. The clear separation of the ME responses in the gate dielectric layer of ME-OFET from those of the other parameters was demonstrated using the AC gate biasing method and enabled the extraction of the ME coefficient of ME materials. Additionally, the device shows high stability after cyclic bending of 10,000 cycles at a banding radius of 1.2 cm. The device has significant potential for not only the extraction of the intrinsic characterization of ME materials but also the sensing of a magnetic field in integrated flexible electronic systems.展开更多
This paper describes the definition of the complete transistor.For semiconductor devices,the complete transistor is always bipolar,namely,its electrical characteristics contain both electron and hole currents controll...This paper describes the definition of the complete transistor.For semiconductor devices,the complete transistor is always bipolar,namely,its electrical characteristics contain both electron and hole currents controlled by their spatial charge distributions.Partially complete or incomplete transistors,via coined names or/and designed physical geometries,included the 1949 Shockley p/n junction transistor（later called Bipolar Junction Transistor,BJT）,the 1952 Shockley unipolar ＇field-effect＇ transistor（FET,later called the p/n Junction Gate FET or JGFET）,as well as the field-effect transistors introduced by later investigators.Similarities between the surface-channel MOS-gate FET（MOSFET） and the volume-channel BJT are illustrated.The bipolar currents,identified by us in a recent nanometer FET with 2-MOS-gates on thin and nearly pure silicon base,led us to the recognition of the physical makeup and electrical current and charge compositions of a complete transistor and its extension to other three or more terminal signal processing devices,and also the importance of the terminal contacts.展开更多
提出了一种堆叠栅介质对称双栅单Halo应变Si金属氧化物半导体场效应管(metal-oxide semiconductor field effect transistor,MOSFET)新器件结构.采用分区的抛物线电势近似法和通用边界条件求解二维泊松方程,建立了全耗尽条件下的表面势...提出了一种堆叠栅介质对称双栅单Halo应变Si金属氧化物半导体场效应管(metal-oxide semiconductor field effect transistor,MOSFET)新器件结构.采用分区的抛物线电势近似法和通用边界条件求解二维泊松方程,建立了全耗尽条件下的表面势和阈值电压的解析模型.该结构的应变硅沟道有两个掺杂区域,和常规双栅器件(均匀掺杂沟道)比较,沟道表面势呈阶梯电势分布,能进一步提高载流子迁移率;探讨了漏源电压对短沟道效应的影响;分析得到阈值电压随缓冲层Ge组分的提高而降低,随堆叠栅介质高k层介电常数的增大而增大,随源端应变硅沟道掺杂浓度的升高而增大,并解释了其物理机理.分析结果表明:该新结构器件能够更好地减小阈值电压漂移,抑制短沟道效应,为纳米领域MOSFET器件设计提供了指导.展开更多
We propose a nanoscale single gate ultra thin body intrinsic channel tunnel field effect transistor using the charge plasma concept for ultra low power applications. The characteristics of TFETs （having low leakage）...We propose a nanoscale single gate ultra thin body intrinsic channel tunnel field effect transistor using the charge plasma concept for ultra low power applications. The characteristics of TFETs （having low leakage） are improved by junctionless TFETs through blending advantages of Junctionless FETs （with high on current）. We further improved the characteristics, simultaneously simplifying the structure at a very low power rating using an InAs channel. We found that the proposed device structure has reduced short channel effects and parasitics and provides high speed operation even at a very low supply voltage with low leakage. Simulations resulted in Iovv of - 9 × 10-16A/um, IoN of ,-20uA/um, ION/IoFF of--2× 1010, threshold voltage of 0.057 V, subthreshold slope of 7 mV/dec and DIBL of 86 mV/V for PolyGate/HfO2/InAs TFET at a temperature of 300 K, gate length of 20 nm, oxide thickness of 2 nm, film thickness of 10 nm, low-k spacer thickness of 10 nm and VDD of 0.2 V.展开更多
文摘In the ultra-thin relaxed SiGe virtual substrates, a strained-Si channel p-type Metal Oxide Semiconductor Field Effect Transistor (p-MOSFET) is presented. Built on strained-Si/240nm relaxed-Si0.8 Ge0.2/ 100nm Low Temperature Si (LT-Si)/10nm Si buffer was grown by Molecular Beam Epitaxy (MBE), in which LT-Si layer is used to release stress of the SiGe layer and made it relaxed. Measurement indicates that the strained-Si p-MOSFET's (L=4.2μm) transconductance and the hole mobility are enhanced 30% and 50% respectively, compared with that of conventional bulk-Si. The maximum hole mobility for strained-Si device is 140cm2/Vs. The device performance is comparable to devices achieved on several μm thick composition graded buffers and relaxed-SiGe layer virtual substrates.
基金National Natural Science Foundation of China(22271281,91961115,22325109,22171263,and 62227815)Scientific Research and Equipment Development Pro-ject of Chinese Academy of Sciences(YJKYQ20210024)+2 种基金Fujian Science&Technology Innovation Laboratory for Optoelectronic Information of China(2021ZR101)Natural Science Foundation of Fujian Province(2022J06032 and 2021J02017)Selfdeployment Project Research Program of Haixi Institutes,Chinese Academy of Sciences(CXZX-2022-GH09)。
文摘One-dimensional(1D)semiconductor nanostructures exhibit exceptional performance in mitigating short-channel effects and ensuring low power consumption.However,the scarcity of high-mobility ptype 1D materials impedes further advancement.Molecular-based materials offer high designability in structure and properties,making them a promising candidate for 1D p-type semiconductor materials.A molecular-based 1D p-type material was developed under the guidance of coordination chemistry.Cu-HT(HT is the abbreviation of p-hydroxy thiophenol)combines the merits of highly orbital overlap between Cu and S,fully covered surface modification with phenol functional groups,and unique cuprophilic(Cu-Cu)interactions.As such,Cu-HT has a remarkable hole mobility of 27.2 cm2V-1s-1,which is one of the highest reported values for 1D molecular-based materials to date and even surpass those of commonly used amorphous silicon as well as the majority of 1D inorganic materials.This achievement underscores the significant potential of coordination polymers in optimizing carrier transport and represents a major advancement in the synthesis of high-performance,1D p-type semiconductor materials.?2024 Science China Press.Published by Elsevier B.V.and Science China Press.All rights are reserved.
文摘Solution-processed n-type organic semiconductor micro/nanocrystals （OSMCs） are fundamental elements for developing low-cost, large-area, and all organic logic/complementary circuits. However, the development of air-stable, highly aligned n-channel OSMC arrays for realizing high-performance devices lags far behind their p-channel counterparts. Herein, we present a simple one-step slope-coating method for the large-scale, solution-processed fabrication of highly aligned, air-stable, n-channel ribbon-shaped single-crystalline N,N＇-bis（2- phenylethyl）-perylene-3,4：9,10-tetracarboxylic diimide （BPE-PTCDI） arrays. The slope and pattemed photoresist （PR） stripes on the substrate are found to be crucial for the formation of large-area submicron ribbon arrays. The width and thickness of the BPE-PTCDI submicron ribbons can be finely tuned by controlling the solution concentration as well as the slope angle. The resulting BPE-PTCDI submicron ribbon arrays possess an optimum electron mobility up to 2.67 cm2.V-l.s-1 （with an average mobility of 1.13 cm2.V-l-s-1）, which is remarkably higher than that of thin film counterparts and better than the performance reported previously for single-crystalline BPE-PTCDI-based devices. Moreover, the devices exhibit robust air stability and remain stable after exposing in air over 50 days. Our study facilitates the development of air-stable, n-channel organic field-effect transistors （OFETs） and paves the way towards the fabrication of high-performance, organic single crystal-based integrated circuits.
文摘Flexible magnetoelectric （ME） materials have been studied for new applications such as memory, energy harvesters, and magnetic field sensors. Herein, with the widely studied and progressive advantages of ME phenomena in the multiferroic field, we demonstrate a new approach for utilizing flexible ME materials as gate dielectric layers in ME organic field-effect transistors （ME-OFET） that can be used for sensing a magnetic field and extracting the ME properties of the gate dielectric itself. The magnetoelectric nanohybrid gate dielectric layer comprises sandwiched stacks of magnetostrictive CoFe2O4 nanoparticles and a highly piezoelectric poly（vinylidene fluoride-co-trifluoroethylene） layer. While varying the magnetic field applied to the ME gate dielectric, the ME effect in the functional gate dielectric modulates the channel conductance of the ME-OFET owing to a change in the effective gate field. The clear separation of the ME responses in the gate dielectric layer of ME-OFET from those of the other parameters was demonstrated using the AC gate biasing method and enabled the extraction of the ME coefficient of ME materials. Additionally, the device shows high stability after cyclic bending of 10,000 cycles at a banding radius of 1.2 cm. The device has significant potential for not only the extraction of the intrinsic characterization of ME materials but also the sensing of a magnetic field in integrated flexible electronic systems.
基金supported by the CTSAH Associates(CTSA)founded by the late Linda Su-Nan Chang Sah,in memory of her 70th anniversary. The content of this article was presented as the conference opening keynote by Jie Binbin at the Work-shop on Compact Modeling on May 5, 2009 in Houston, Texas, USA
文摘This paper describes the definition of the complete transistor.For semiconductor devices,the complete transistor is always bipolar,namely,its electrical characteristics contain both electron and hole currents controlled by their spatial charge distributions.Partially complete or incomplete transistors,via coined names or/and designed physical geometries,included the 1949 Shockley p/n junction transistor（later called Bipolar Junction Transistor,BJT）,the 1952 Shockley unipolar ＇field-effect＇ transistor（FET,later called the p/n Junction Gate FET or JGFET）,as well as the field-effect transistors introduced by later investigators.Similarities between the surface-channel MOS-gate FET（MOSFET） and the volume-channel BJT are illustrated.The bipolar currents,identified by us in a recent nanometer FET with 2-MOS-gates on thin and nearly pure silicon base,led us to the recognition of the physical makeup and electrical current and charge compositions of a complete transistor and its extension to other three or more terminal signal processing devices,and also the importance of the terminal contacts.
文摘提出了一种堆叠栅介质对称双栅单Halo应变Si金属氧化物半导体场效应管(metal-oxide semiconductor field effect transistor,MOSFET)新器件结构.采用分区的抛物线电势近似法和通用边界条件求解二维泊松方程,建立了全耗尽条件下的表面势和阈值电压的解析模型.该结构的应变硅沟道有两个掺杂区域,和常规双栅器件(均匀掺杂沟道)比较,沟道表面势呈阶梯电势分布,能进一步提高载流子迁移率;探讨了漏源电压对短沟道效应的影响;分析得到阈值电压随缓冲层Ge组分的提高而降低,随堆叠栅介质高k层介电常数的增大而增大,随源端应变硅沟道掺杂浓度的升高而增大,并解释了其物理机理.分析结果表明:该新结构器件能够更好地减小阈值电压漂移,抑制短沟道效应,为纳米领域MOSFET器件设计提供了指导.
文摘We propose a nanoscale single gate ultra thin body intrinsic channel tunnel field effect transistor using the charge plasma concept for ultra low power applications. The characteristics of TFETs （having low leakage） are improved by junctionless TFETs through blending advantages of Junctionless FETs （with high on current）. We further improved the characteristics, simultaneously simplifying the structure at a very low power rating using an InAs channel. We found that the proposed device structure has reduced short channel effects and parasitics and provides high speed operation even at a very low supply voltage with low leakage. Simulations resulted in Iovv of - 9 × 10-16A/um, IoN of ,-20uA/um, ION/IoFF of--2× 1010, threshold voltage of 0.057 V, subthreshold slope of 7 mV/dec and DIBL of 86 mV/V for PolyGate/HfO2/InAs TFET at a temperature of 300 K, gate length of 20 nm, oxide thickness of 2 nm, film thickness of 10 nm, low-k spacer thickness of 10 nm and VDD of 0.2 V.
