Properties of a MOS Device on Single Layer Molybdenum Disulfide

The properties of a metal-oxide-semiconductor device on a single layer MoS_(2)(molybdenum disulfide)semiconductor are determined theoretically utilizing the concept of physics that the carrier effective masses in materials are related to the intrinsic Fermi energy levels in materials by the universal mass-energy equivalence equation given as dE/E=dm/m,where E is the energy and m is the mass of the free electron.The known parameters of electron effective mass of 0.48 m and the direct bandgap of 1.8 eV for monolayer MoS_(2) semiconductor are utilized to determine the properties of the MOS(metal-oxide-semiconductor)device,with the given previous research consequence that the threshold for electron heating in SiO_(2) is 2 MV/cm-eV.

Impact of Native Defects in the High Dielectric Constant Oxide HfSiO_4 on MOS Device Performance

Native dejects in HfSiO4 are investigated by first principles calculations. Transition levels of native detects can be accurately described by employing the nonlocal HSE06 hybrid functional. This methodology overcomes the band gap problem in traditional functionals. By band alignments among the Si, GaAs and HfSiO4. we are able to determine the position of defect levels in Si and GaAs relative to the HfSiO4 band gap. We evaluate the. possibility of these defects acting as fixed charge. Native defects lead to the change of valence and conduction band offsets. Gate leakage current is evaluated by the band offset. In addition, we also investigate diffusions of native defects, and discuss how they affect the MOS device performance.

Radiation effects on MOS and bipolar devices by 8 MeV protons,60 MeV Br ions and 1 MeV electrons

The radiation effects of the metal-oxide-semiconductor （MOS） and the bipolar devices are characterised using 8 MeV protons, 60 MeV Br ions and 1 MeV electrons. Key parameters are measured in-situ and compared for the devices. The ionising and nonionising energy losses of incident particles are calculated using the Geant4 and the stopping and range of ions in matter code. The results of the experiment and energy loss calculation for different particles show that different incident particles may give different contributions to MOS and bipolar devices. The irradiation particles, which cause a larger displacement dose within the same chip depth of bipolar devices at a given total dose, would generate more severe damage to the voltage parameters of the bipolar devices. On the contrary, the irradiation particles, which cause larger ionising damage in the gate oxide, would generate more severe damage to MOS devices. In this investigation, we attempt to analyse the sensitivity to radiation damage of the different parameter of the MOS and bipolar devices by comparing the irradiation experimental data and the calculated results using Geant4 and SRIM code.

Improved interface properties of an HfO_2 gate dielectric GaAs MOS device by using SiN_x as an interfacial passivation layer

A GaAs metal-oxide-semiconductor （MOS） capacitor with HfO2 as gate dielectric and silicon nitride （SiNx） as the interlayer （IL） is fabricated. Experimental results show that the sample with the SiNx IL has an improved capacitance- voltage characteristic, lower leakage current density （0.785 × 10^-6 Alcm^2 at Vfo ＋ 1 V） and lower interface-state density （2.9 × 10^12 eV^-1 ·cm^-2） compared with other samples with N2- or NH3-plasma pretreatment. The influences of post- deposition annealing temperature on electrical properties are also investigated for the samples with SiNx IL. The sample annealed at 600 ℃ exhibits better electrical properties than that annealed at 500 ℃, which is attributed to the suppression of native oxides, as confirmed by XPS analyses.

Measurement Process of MOSFET Device Parameters with VEE Pro Software for DP4T RF Switch

To design a Double-Pole Four-Throw (DP4T) RF switch, measurement of device parameters is required. In this DP4T RF switch CMOS is a unit cell, so with a thin oxide layer of thickness 628 ? which is measured optically. Some of the material parameters were found by the curve drawn between Capacitance versus Voltage (C-V) and Capacitance versus Frequency (C-F) with the application of Visual Engineering Environment Programming (VEE Pro). To perform the measurement processing at a distance, from the hazardous room, we use VEE Pro software. In this research, to acquire a fine result for RF MOSFET, we vary the voltage with minor increments and perform the measurements by vary the applying voltage from +5 V to –5 V and then back to +5 V again and then save this result in a data sheet with respect to temperature, voltage and frequency using this program. We have investigated the characteristics of RF MOSFET, which will be used for the wireless telecommunication systems.

A SIMPLE APPROACH TO THE CALCULATION OF THE MECHANICAL STRESS IN SILICON DEVICES

The residual mechanical stress in SiO2 films results in the degradation of mobilitiesin MOSFETs. Based on the edge force approximation in SiO2 films, the stress field in MOS devicesis calculated. The results here are in agreement with those measured by the Raman spectrummethod.

Aether原理图驱动版图工具Device Matching功能的原理与实现

本文针对Aether原理图驱动版图工具中的器件匹配功能的原理与机制予以论述。本文首先探讨当前深亚微米工艺下进行器件失配的由来;其次描述了器件匹配的原理;最后针对设计工艺中不同的器件类型晶体管(MOS)、电阻(Resistor)等进行匹配实现,并基于Aether原理图驱动版图工具给出该功能实现的实际效果图,提出了产品化过程中注意到一些问题。市场实践表明,该功能在版图设计过程中能够帮助版图工程师快速完成匹配器件的版图生成,从而极大提高了版图工程师的设计效率。

Drain and Source on Insulator MOSFETs Fabricated by Local SIMOX Technology

To overcome the floating-body effect and self-heating effect of SOI devices,the drain and source on insulator (DSOI) structure is fabricated and tested.The low dose developed recently and low energy local SIMOX technology combined with the conventional CMOS technology is used to fabricate this kind of devices.Using this method,DSOI,SOI,and bulk MOSFETs are successfully integrated on a single chip.Test results show that the drain induced barrier lowering effect is suppressed.The breakdown voltage drain-to-source is greatly increased for DSOI devices due to the elimination of the floating-body effect.And the self-heating effect is also reduced and thus the reliability increased.At the same time,the advantage of SOI devices in speed is maintained.The technology makes it possible to integrate low voltage,low power,low speed SOI devices or high voltage,high power,high speed DSOI devices on one chip and it offers option for developing system-on-chip technology.

A Method to Separate Effects of Oxide-Trapped Charge and Interface-Trapped Charge on Threshold Voltage in pMOSFETs Under Hot-Carrier Stress

A simple new method based on the measurement of charge pumping technique is proposed to separate and quantify experimentally the effects of oxide-trapped charges and interface-trapped charges on threshold voltage degradation in p-channel metal-oxide-semiconductor field-effect transistors (pMOSFETs) under hot-carrier stress.Further,the experimental results verify the validness of this method.It is shown that,all three mechanisms of electron trapping effect,hole trapping effect and interface trap generation play important roles in p-channel MOSFETs degradation.It is noted that interface-trapped charge is still the dominant mechanism for hot-carrier-induced degradation in p-channel MOSFETs,while a significant contribution of oxide-trapped charge to threshold voltage is demonstrated and quantified.

Sinusoidal Steady State Analysis on 4H-SiC Buried Channel MOSFETs

With the combined use of the drift-diffusion （DD） model, experiment measured parameters and small-signal sinusoidM steady-state analysis, we extract the Y-parameters for 4H-SiC buried-channel metal oxide semicon- ductor field effect transistors （BCMOSFETs）. Output short-circuit current gain G and Mason＇s invariant U are cMculated for extrapolating unity current gain frequency in the common-source configuration fT and the maximum frequency of oscillation fmax, respectively. Here fT = 800 MHz and fmax= 5 GHz are extracted for the 4H-SiC BCMOSFETs, while the field effect mobility reaches its peak value 87cm2/Vs when VGs = 4.5 V. Simulation results clearly show that the characteristic frequency of 4H-SiC BCMOSFETs and field effect mobility are superior, due to the novel structure, compared with conventional MOSFETs.

Improved interfacial properties of HfGdON gate dielectric Ge MOS capacitor by optimizing Gd content

High-quality dielectric/Ge interface and low gate leakage current are crucial issues for high-performance nanoscaled Ge-based complementary metal–oxide–semiconductor(CMOS) device. In this paper, the interfacial and electrical properties of high-k Hf Gd ON/La Ta ON stacked gate dielectric Ge metal–oxide–semiconductor(MOS) capacitors with different gadolinium(Gd) contents are investigated. Experimental results show that when the controlling Gd content is a suitable value(e.g., 13.16%), excellent device performances can be achieved: low interface-state density(6.93 × 10^11 cm^-2·e V-1), small flatband voltage(0.25 V), good capacitance–voltage behavior, small frequency dispersion, and low gate leakage current(2.29× 10^-6 A/cm^2 at Vg = Vfb + 1 V). These could be attributed to the repair of oxygen vacancies, the increase of conduction band offset, and the suppression of germanate and suboxide Ge Ox at/near the high k/Ge interface by doping suitable Gd into Hf ON.

SiC gate-controlled bipolar field effect composite transistor with polysilicon region for improving on-state current

A novel silicon carbide gate-controlled bipolar field effect composite transistor with poly silicon region(SiC GCBTP)is proposed.Different from the traditional electrode connection mode of SiC vertical diffused MOS(VDMOS),the P+region of P-well is connected with the gate in SiC GCBTP,and the polysilicon region is added between the P+region and the gate.By this method,additional minority carriers can be injected into the drift region at on-state,and the distribution of minority carriers in the drift region will be optimized,so the on-state current is increased.In terms of static characteristics,it has the same high breakdown voltage(811 V)as SiC VDMOS whose length of drift is 5.5μm.The on-state current of SiC GCBTP is 2.47×10^(-3)A/μm(V_(G)=10 V,V_(D)=10 V)which is 5.7 times of that of SiC IGBT and 36.4 times of that of SiC VDMOS.In terms of dynamic characteristics,the turn-on time of SiC GCBTP is only 0.425 ns.And the turn-off time of SiC GCBTP is similar to that of SIC insulated gate bipolar transistor(IGBT),which is 114.72 ns.

Comparison of interfacial and electrical properties between Al_2O_3 and ZnO as interface passivation layer of GaAs MOS device with HfTiO gate dielectric

GaAs metal–oxide–semiconductor（MOS） capacitors with HfTiO as the gate dielectric and Al2O3 or ZnO as the interface passivation layer（IPL） are fabricated. X-ray photoelectron spectroscopy reveals that the Al2O3 IPL is more effective in suppressing the formation of native oxides and As diffusion than the ZnO IPL. Consequently, experimental results show that the device with Al2O3 IPL exhibits better interfacial and electrical properties than the device with ZnO IPL： lower interface-state density（7.2×10^12 eV1cm^2/, lower leakage current density（3.60×10^7A/cm^2 at Vg D1 V） and good C–V behavior.

Few-layer MoS2-deposited microfiber as highly nonlinear photonic device for pulse shaping in a fiber laser [Invited]

Two-dimensional（2D） materials have emerged as attractive mediums for fabricating versatile optoelectronic devices. Recently, few-layer molybdenum disulfide（MoS2）, as a shining 2D material, has been discovered to possess both the saturable absorption effect and large nonlinear refractive index. Herein, taking advantage of the unique nonlinear optical properties of MoS2, we fabricated a highly nonlinear saturable absorption photonic device by depositing the few-layer MoS2 onto the microfiber. With the proposed MoS2 photonic device, apart from the conventional soliton patterns, the mode-locked pulses could be shaped into some new soliton patterns, namely,multiple soliton molecules, localized chaotic multipulses, and double-scale soliton clusters. Our findings indicate that the few-layer MoS2-deposited microfiber could operate as a promising highlynonlinear photonic device for the related nonlinear optics applications.

Discussion on the Electron and Hole Effective Masses in Thermal Silicon

This review and research study provides conclusive discussion on the electron and hole effective masses in thermal silicon dioxide placing their values at 0.42m and 0.58m,where m is the free electron mass,correct to two decimal places.Only one of the masses needs to be determined as the electron and hole masses in materials add up to be equal to free electron mass with the hole effective mass being larger than the electron effective mass.The review also convinces the reader that the CBO(conduction band offset)or the Si-SiO2 barrier height at the oxide/silicon interface of a Si MOS(metal-oxide-semiconductor)device is 3.20 eV.

Coexistence of bound soliton and harmonic mode-locking soliton in an ultrafast fiber laser based on MoS2-deposited microfiber photonic device

As the typical material of two-dimensional transition metal dichalcogenides（TMDs）, few-layered MoS2 possesses broadband saturable absorption and a large nonlinear refractive index, which could be regarded as a promising candidate for dual-function photonic device fabrication. In this work, the coexistence of a bound soliton and harmonic mode-locking soliton was demonstrated in an ultrafast fiber laser based on a MoS2-deposited microfiber photonic device. Through a band-pass filter, each multi-soliton state was investigated separately. The bound soliton has periodic spectral modulation of 1.55 nm with a corresponding pulse separation of 5.16 ps.The harmonic mode-locking soliton has the repetition rate of 479 MHz, corresponding to the 65th harmonic of the fundamental repetition rate. The results indicated that there exist more possibilities of different multi-soliton composites, which would enhance our understanding of multi-soliton dynamics.

Enabling novel device functions with black phosphorus/MoS2 van der Waals heterostructures

Van der Waals heterostructure, which consists of various two- dimensional （2D） layered materials stacked along the direction perpendicular to their 2D plane, has emerged as a promising material system for device applications in recent years .

Floating-gate photosensitive synaptic transistors with tunable functions for neuromorphic computing

Synaptic devices that merge memory and processing functions into one unit have broad application potentials in neuromorphic computing, soft robots, and humanmachine interfaces. However, most previously reported synaptic devices exhibit fixed performance once been fabricated,which limits their application in diverse scenarios. Here, we report floating-gate photosensitive synaptic transistors with charge-trapping perovskite quantum dots(PQDs) and atomic layer deposited(ALD) Al_(2)O_(3) tunneling layers, which exhibit typical synaptic behaviors including excitatory postsynaptic current(EPSC), pair-pulse facilitation and dynamic filtering characteristics under both electrical or optical signal stimulation. Further, the combination of the high-quality Al2O3 tuning layer and highly photosensitive PQDs charge-trapping layer provides the devices with extensively tunable synaptic performance under optical and electrical co-modulation. Applying light during electrical modulation can significantly improve both the synaptic weight changes and the nonlinearity of weight updates, while the memory effect under light modulation can be obviously adjusted by the gate voltage.The pattern learning and forgetting processes for "0" and "1"with different synaptic weights and memory times are further demonstrated in the device array. Overall, this work provides synaptic devices with tunable functions for building complex and robust artificial neural networks.

Optoelectronic devices based on two-dimensional transition metal dichalcogenides

In the past few years, two-dimensional （2D） transition metal dichalcogenide （TMDC） materials have attracted increasing attention of the research community, owing to their unique electronic and optical properties, ranging from the valley-spin coupling to the indirect-to-direct bandgap transition when scaling the materials from multi-layer to monolayer. These properties are appealing for the development of novel electronic and optoelectronic devices with important applications in the broad fields of communication, computation, and healthcare. One of the key features of the TMDC family is the indirect-to-direct bandgap transition that occurs when the material thickness decreases from multilayer to monolayer, which is favorable for many photonic applications. TMDCs have also demonstrated unprecedented flexibility and versatility for constructing a wide range of heterostructures with atomic-level control over their layer thickness that is also free of lattice mismatch issues. As a result, layered TMDCs in combination with other 2D materials have the potential for realizing novel high-performance optoelectronic devices over a broad operating spectral range. In this article, we review the recent progress in the synthesis of 2D TMDCs and optoelectronic devices research. We also discuss the challenges facing the scalable applications of the family of 2D materials and provide our perspective on the opportunities offered by these materials for future generations of nanophotonics technology.

Analysis and Characterization of Normally-Off Gallium Nitride High Electron Mobility Transistors

High electron mobility transistor(HEMT)based on gallium nitride(GaN)is one of the most promising candidates for the future generation of high frequencies and high-power electronic applications.This research work aims at designing and characterization of enhancement-mode or normally-off GaN HEMT.The impact of variations in gate length,mole concentration,barrier variations and other important design parameters on the performance of normally-off GaN HEMT is thoroughly investigated.An increase in the gate length causes a decrease in the drain current and transconductance,while an increase in drain current and transconductance can be achieved by increasing the concentration of aluminium(Al).For Al mole fractions of 23%,25%,and 27%,within Al gallium nitride(AlGaN)barrier,the GaN HEMT devices provide a maximum drain current of 347,408 and 474 mA/μm and a transconductance of 19,20.2,21.5 mS/μm,respectively.Whereas,for Al mole fraction of 10%and 15%,within AlGaN buffer,these devices are observed to provide a drain current of 329 and 283 mA/μm,respectively.Furthermore,for a gate length of 2.4,3.4,and 4.4μm,the device is observed to exhibit a maximum drain current of 272,235,and 221 mA/μm and the transconductance of 16.2,14,and 12.3 mS/μm,respectively.It is established that a maximum drain current of 997 mA/μm can be achieved with an Al concentration of 23%,and the device exhibits a steady drain current with enhanced transconductance.These observations demonstrate tremendous potential for two-dimensional electron gas(2DEG)for securing of the normally-off mode operation.A suitable setting of gate length and other design parameters is critical in preserving the normally-off mode operation while also enhancing the critical performance parameters at the same time.Due to the normallyon depletion-mode nature of GaN HEMT,it is usually not considered as suitable for high power levels,frequencies,and temperature.In such settings,a negative bias is required to enter the blocking condition;however,in the before-mentioned normally-off devices,the negative bias can be avoided and the channel can be depleted without applying a negative bias.