A readout electronics has been developed for the silicon strip array detector system of HIRFL-CSR-ETF.It consists of 48 front end electronics(FEE)boards,12 PXI-DAQ boards and one trigger board.It can implement energy ...A readout electronics has been developed for the silicon strip array detector system of HIRFL-CSR-ETF.It consists of 48 front end electronics(FEE)boards,12 PXI-DAQ boards and one trigger board.It can implement energy and time measurements of 4608 channels.Each FEE board is based on 6 ASICs(ATHED),which implements energy and time measurements of 96 channels.The PXI-DAQ board meets requirements of high-speed counting and amount of readout channels and can process signals of 4 FEEs.The trigger board is developed to select the valid events.The energy linearity of the readout electronics is better than 0.3%in the dynamic range of 0.1-0.7V.In the test with a standard triple alpha source,the energy resolution was 1.8%at 5.48 MeV.This readout electronics enables the silicon strip array system to identify particles of A<14.展开更多
The architecture of a multi-channel front-end system is important for realizing a high-resolution PET system. We propose a novel front-end readout electronic system with TDC to deal with time information for PET syste...The architecture of a multi-channel front-end system is important for realizing a high-resolution PET system. We propose a novel front-end readout electronic system with TDC to deal with time information for PET system which can easily design the timing control. Each channel consists of a charge preamplifier, slow/fast shaper, discriminator and an analog memory. There are an ADC and a TDC to process the energy information and time information for each channel at the same time. In this paper, the whole system signals flow is all simulated by MATLAB. The simulation results show that the proposed system can process slender current from the detector and achieve the energy and time information. The proposed architecture can be applied to high-resolution PET imaging systems with multi-channel ASICs.展开更多
Front-end readout electronics have been developed for silicon strip detectors at our institute. In this system an Application Specific Integrated Circuit (ASIC) ATHED is used to realize multi-channel energy and time...Front-end readout electronics have been developed for silicon strip detectors at our institute. In this system an Application Specific Integrated Circuit (ASIC) ATHED is used to realize multi-channel energy and time measurements. The slow control of ASIC chips is achieved by parallel port and the timing control signals of ASIC chips are implemented with the CPLD. The data acquisition is carried out with a PXI-DAQ card. The software has a user-friendly GUI developed with LabWindows/CVI in the Windows XP operating system. The test results show that the energy resolution is about 1.14% for alpha at 5.48 MeV and the maximum channel crosstalk of the system is 4.60%. The performance of the system is very reliable and is suitable for nuclear physics experiments.展开更多
设计了一种用于兰州重离子治癌系统中剂量监测的新型电荷-频率转换电路。该电路将输入的电流信号直接转换为脉冲输出,通过计数器对脉冲个数进行计数实现对输入电荷的测量,从而实现对照射剂量的实时监测。实验表明:该电路可实现0.01 n A^...设计了一种用于兰州重离子治癌系统中剂量监测的新型电荷-频率转换电路。该电路将输入的电流信号直接转换为脉冲输出,通过计数器对脉冲个数进行计数实现对输入电荷的测量,从而实现对照射剂量的实时监测。实验表明:该电路可实现0.01 n A^1μA范围内双极性电流的测量,在整个测量范围内线性度好于2.71%。展开更多
A new wide-range fast readout system capable of adaptive identification is designed for wire scanners,which are used to measure beam profiles and emittance.This system is capable of handling varying current signals wi...A new wide-range fast readout system capable of adaptive identification is designed for wire scanners,which are used to measure beam profiles and emittance.This system is capable of handling varying current signals with Gaussian distributions and current pulses up to 1000 counts/s, as well as an input current range of 1 n A–1 m A. When tested, the resolution was found to exceed 3.68% for full scale, the nonlinearity was found to be less than 0.11%, and the measurement sensibility was found to be less than 5 p A. We believe that the system will play a crucial role in improving the measurement accuracy of beam diagnosis and the efficiency of accelerator operation,as well as decreasing the time required for beam tuning.This system was applied to the beam diagnosis of an injector II prototype for an accelerator-driven subcritical system and produced excellent measurement results. A description of the adaptive fast readout system for wire scanners is presented in this paper.展开更多
A multi-channel front-end ASIC has been developed for a fast neutron spectrometer based on Gas Electron Multiplier (GEM)-Time Projection Chamber (TPC). Charge Amplifier and Shaping Amplifier for GEM (CASAGEM) in...A multi-channel front-end ASIC has been developed for a fast neutron spectrometer based on Gas Electron Multiplier (GEM)-Time Projection Chamber (TPC). Charge Amplifier and Shaping Amplifier for GEM (CASAGEM) integrates 16+1 channels: 16 channels for anodes and 1 channel for cathode. The gain and the shaping time are adjustable from 2 to 40 mV/fC and from 20 to 80 ns, respectively. The prototype ASIC is fabricated in 0.35 μm CMOS process. An evaluation Print Circuit Board (PCB) was also developed for chip tests. In total 20 chips have been tested. The integrated nonlinearity is less than 1%. The equivalent noise electrons is less than 2000e when the input capacitor is 50 pF. The time jitter is less than 1 ns. The design and the test results are presented in the paper.展开更多
近年来应用于中高能核物理实验的先进前端读出专用集成电路(application specific integrated circuit,ASIC)芯片呈现出越来越强的数字化趋势,可提高系统的集成度并降低功耗。论文研制了一种高计数率多通道时间测量与串行读出电路(high-...近年来应用于中高能核物理实验的先进前端读出专用集成电路(application specific integrated circuit,ASIC)芯片呈现出越来越强的数字化趋势,可提高系统的集成度并降低功耗。论文研制了一种高计数率多通道时间测量与串行读出电路(high-count rate multi-channel time measurement and serial readout circuit,HMTRC),可实现核事件去稀疏化、去随机化的读出。该电路主要包括了基于时钟分相技术的时间数字转化器、控制器、先进先出存储器和基于令牌环逻辑的轮询读出模块。HMTRC已被集成到一款自研的16通道前端读出ASIC芯片中,可测量和储存时间信息,并利用数字驱动的前端读出架构实现时间与能量信息同步读出。测试表明,时间分辨率好于2 ns,功能符合预期。展开更多
基金Supported by the National Natural Science Foundation of China(Nos.11005135 and 11079045)the Important Direction Project of the CAS Knowledge Innovation Program(No.KJCX2-YW-N27)the Foundation of director of Institute Modern Physics,CAS(No.Y207170SZ0)
文摘A readout electronics has been developed for the silicon strip array detector system of HIRFL-CSR-ETF.It consists of 48 front end electronics(FEE)boards,12 PXI-DAQ boards and one trigger board.It can implement energy and time measurements of 4608 channels.Each FEE board is based on 6 ASICs(ATHED),which implements energy and time measurements of 96 channels.The PXI-DAQ board meets requirements of high-speed counting and amount of readout channels and can process signals of 4 FEEs.The trigger board is developed to select the valid events.The energy linearity of the readout electronics is better than 0.3%in the dynamic range of 0.1-0.7V.In the test with a standard triple alpha source,the energy resolution was 1.8%at 5.48 MeV.This readout electronics enables the silicon strip array system to identify particles of A<14.
文摘The architecture of a multi-channel front-end system is important for realizing a high-resolution PET system. We propose a novel front-end readout electronic system with TDC to deal with time information for PET system which can easily design the timing control. Each channel consists of a charge preamplifier, slow/fast shaper, discriminator and an analog memory. There are an ADC and a TDC to process the energy information and time information for each channel at the same time. In this paper, the whole system signals flow is all simulated by MATLAB. The simulation results show that the proposed system can process slender current from the detector and achieve the energy and time information. The proposed architecture can be applied to high-resolution PET imaging systems with multi-channel ASICs.
基金Supported by National Natural Science Foundation of China(10735060 and 11005135)Important Direction Project of CAS Knowledge Innovation Program(KJCX2-YW-N27)
文摘Front-end readout electronics have been developed for silicon strip detectors at our institute. In this system an Application Specific Integrated Circuit (ASIC) ATHED is used to realize multi-channel energy and time measurements. The slow control of ASIC chips is achieved by parallel port and the timing control signals of ASIC chips are implemented with the CPLD. The data acquisition is carried out with a PXI-DAQ card. The software has a user-friendly GUI developed with LabWindows/CVI in the Windows XP operating system. The test results show that the energy resolution is about 1.14% for alpha at 5.48 MeV and the maximum channel crosstalk of the system is 4.60%. The performance of the system is very reliable and is suitable for nuclear physics experiments.
文摘设计了一种用于兰州重离子治癌系统中剂量监测的新型电荷-频率转换电路。该电路将输入的电流信号直接转换为脉冲输出,通过计数器对脉冲个数进行计数实现对输入电荷的测量,从而实现对照射剂量的实时监测。实验表明:该电路可实现0.01 n A^1μA范围内双极性电流的测量,在整个测量范围内线性度好于2.71%。
基金supported by the National Natural Science Foundation of China(Nos.11475233,11705257,and 11775285)
文摘A new wide-range fast readout system capable of adaptive identification is designed for wire scanners,which are used to measure beam profiles and emittance.This system is capable of handling varying current signals with Gaussian distributions and current pulses up to 1000 counts/s, as well as an input current range of 1 n A–1 m A. When tested, the resolution was found to exceed 3.68% for full scale, the nonlinearity was found to be less than 0.11%, and the measurement sensibility was found to be less than 5 p A. We believe that the system will play a crucial role in improving the measurement accuracy of beam diagnosis and the efficiency of accelerator operation,as well as decreasing the time required for beam tuning.This system was applied to the beam diagnosis of an injector II prototype for an accelerator-driven subcritical system and produced excellent measurement results. A description of the adaptive fast readout system for wire scanners is presented in this paper.
基金Supported by National Natural Science Foundation of China(11275109)
文摘A multi-channel front-end ASIC has been developed for a fast neutron spectrometer based on Gas Electron Multiplier (GEM)-Time Projection Chamber (TPC). Charge Amplifier and Shaping Amplifier for GEM (CASAGEM) integrates 16+1 channels: 16 channels for anodes and 1 channel for cathode. The gain and the shaping time are adjustable from 2 to 40 mV/fC and from 20 to 80 ns, respectively. The prototype ASIC is fabricated in 0.35 μm CMOS process. An evaluation Print Circuit Board (PCB) was also developed for chip tests. In total 20 chips have been tested. The integrated nonlinearity is less than 1%. The equivalent noise electrons is less than 2000e when the input capacitor is 50 pF. The time jitter is less than 1 ns. The design and the test results are presented in the paper.
文摘近年来应用于中高能核物理实验的先进前端读出专用集成电路(application specific integrated circuit,ASIC)芯片呈现出越来越强的数字化趋势,可提高系统的集成度并降低功耗。论文研制了一种高计数率多通道时间测量与串行读出电路(high-count rate multi-channel time measurement and serial readout circuit,HMTRC),可实现核事件去稀疏化、去随机化的读出。该电路主要包括了基于时钟分相技术的时间数字转化器、控制器、先进先出存储器和基于令牌环逻辑的轮询读出模块。HMTRC已被集成到一款自研的16通道前端读出ASIC芯片中,可测量和储存时间信息,并利用数字驱动的前端读出架构实现时间与能量信息同步读出。测试表明,时间分辨率好于2 ns,功能符合预期。