An 88 nm gate-length In0.53Ga0.47As/In0.52Alo.48As InP-based high electron mobility transistor （HEMT） was successfully fabricated with a gate width of 2× 50 μm and source-drain space of 2.4μm. The T-gate was ...An 88 nm gate-length In0.53Ga0.47As/In0.52Alo.48As InP-based high electron mobility transistor （HEMT） was successfully fabricated with a gate width of 2× 50 μm and source-drain space of 2.4μm. The T-gate was defined by electron beam lithography in a trilayer of PMMA/A1/UVIII. The exposure dose and the development time were optimized, and followed by an appropriate residual resist removal process. These devices also demonstrated excellent DC and RF characteristics： the extrinsic maximum transconductance, the full channel cur- rent, the threshold voltage, the current gain cutoff frequency and the maximum oscillation frequency of the HEMTs were 765 mS/mm, 591 mA/mm, -0.5 V, 150 GHz and 201 GHz, respectively. The HEMTs are promising for use in millimeter-wave integrated circuits.展开更多
Silicon on insulator (SOI) technology permits a good solution to the miniaturization as the MOSFET size scales down. This paper is about to compare the electrical performance of nanoscale FD-SOI MOSFET at various gate...Silicon on insulator (SOI) technology permits a good solution to the miniaturization as the MOSFET size scales down. This paper is about to compare the electrical performance of nanoscale FD-SOI MOSFET at various gate lengths. The performance is compared and contrasted with the help of threshold voltage, subthreshold slope, on-state current and leakage current. Interestingly, by decreasing the gate length, the leakage current and on-state current are increased but the threshold voltage is decreased and the sub-threshold slope is degraded. Silvaco two-dimensional simulations are used to analyze the performance of the proposed structures.展开更多
文摘An 88 nm gate-length In0.53Ga0.47As/In0.52Alo.48As InP-based high electron mobility transistor （HEMT） was successfully fabricated with a gate width of 2× 50 μm and source-drain space of 2.4μm. The T-gate was defined by electron beam lithography in a trilayer of PMMA/A1/UVIII. The exposure dose and the development time were optimized, and followed by an appropriate residual resist removal process. These devices also demonstrated excellent DC and RF characteristics： the extrinsic maximum transconductance, the full channel cur- rent, the threshold voltage, the current gain cutoff frequency and the maximum oscillation frequency of the HEMTs were 765 mS/mm, 591 mA/mm, -0.5 V, 150 GHz and 201 GHz, respectively. The HEMTs are promising for use in millimeter-wave integrated circuits.
文摘Silicon on insulator (SOI) technology permits a good solution to the miniaturization as the MOSFET size scales down. This paper is about to compare the electrical performance of nanoscale FD-SOI MOSFET at various gate lengths. The performance is compared and contrasted with the help of threshold voltage, subthreshold slope, on-state current and leakage current. Interestingly, by decreasing the gate length, the leakage current and on-state current are increased but the threshold voltage is decreased and the sub-threshold slope is degraded. Silvaco two-dimensional simulations are used to analyze the performance of the proposed structures.
