A two-stage monolithic microwave integrated circuit （MMIC） low noise amplifier （LNA） fabricated in 0.5 μm GaAs pHEMT is presented. The Miller effect introduced by the parasitic gate-drain capacitance is utilized ...A two-stage monolithic microwave integrated circuit （MMIC） low noise amplifier （LNA） fabricated in 0.5 μm GaAs pHEMT is presented. The Miller effect introduced by the parasitic gate-drain capacitance is utilized to decrease the value of the input inductor. Additionally, the input on-chip inductor is a novel high Q gradual structure. The noise figure is reduced with these two methods. With good input and output matching, the LNA achieves a noise figure of 0.75 dB and a small signal gain of 32.7 dB over 698-806 MHz. The input 1 dB compression point is -21.8 dBm and the input third order interception point is -10 dBm.展开更多
基金Project supported by the External Cooperation Program of BIC,Chinese Academy of Sciences(No.172511KYSB20130108)
文摘A two-stage monolithic microwave integrated circuit （MMIC） low noise amplifier （LNA） fabricated in 0.5 μm GaAs pHEMT is presented. The Miller effect introduced by the parasitic gate-drain capacitance is utilized to decrease the value of the input inductor. Additionally, the input on-chip inductor is a novel high Q gradual structure. The noise figure is reduced with these two methods. With good input and output matching, the LNA achieves a noise figure of 0.75 dB and a small signal gain of 32.7 dB over 698-806 MHz. The input 1 dB compression point is -21.8 dBm and the input third order interception point is -10 dBm.
