RELIABLE HYSTERESIS CURRENT CONTROLLED DUAL BUCK HALF BRIDGE INVERTER

A highly efficient and re liable topology-dual buck half bridge inverter (DBI) is introduced. The existenc e of discontinuous conduction mode (DCM) operation state requires the bias of in du ctor current for DBI implemented with linear controllers like ramp comparison SP WM (RCSPWM) controllers. A novel operation scheme for DBI and a hysteresis curre nt controlled dual buck half bridge inverter (HCDBI) are proposed. The bias curr ent required by RCSPWM DBI is eliminated and conduction losses are dramatically reduced. HCDBI has greatly improved the modulation performance in DCM region for the benefit of its excellent command tracking capability. The operational schem e and control strategy are presented. Power losses of the conventional half brid ge inverter (CHBI) and HCDBI are compared with mathematical computation, and exp erimental verification is also executed. Both calculational and experimental res ults verify that HCDBI has a superior switching performance over CHBI. Its exce llent high frequency operational capacity provides another access to realize high fre quency operation of inverters.

Input-parallel output-parallel configuration of boost half bridge DC-DC converter with control strategy

The concept of connecting two boost half bridge DC-DC converter modules in input-paral- lel output-parallel configuration is presented. The input-parallel-output-parallel （IPOP） converter consists of multiple boost half bridge （BHB） DC-DC converter modules which are connected in par- allel at the input and output side. This kind of converter is an attractive solution for high power ap- plications. The correlation between input current sharing （ICS） and output current sharing （OCS） of the IPOP converter basic modules is described. Two loop control strategies, consisting of input cur- rent loop and output voltage loop, have been developed to achieve equal ICS and OCS in this present work. The control strategy for the IPOP configuration of boost haft bridge DC-DC converter has been verified for different load conditions （half load and full load）, The IPOP system proposed here is comprising of two modules but it can be extended to three or more. The performance of the pro- posed system along with the control strategy is verified by simulation in MATLAB using Simpower tool. Finally the satisfactory simulation results are obtained.

Realization of an 850V High Voltage Half Bridge Gate Drive IC with a New NFFP HVI Structure

A NFFP HVI structure which implements high breakdown voltage without using additional FFP and process steps is proposed in this paper. An 850 V high voltage half bridge gate drive IC with the NFFP HVI structure is experimentally realized using a thin epitaxial BCD process. Compared with the MFFP HVI structure, the proposed NFFP HVI structure shows simpler process and lower cost. The high side offset voltage in the half bridge gate drive IC with the NFFP HVI structure is almost as same as that with the self-shielding structure.

Minimization of Switching Devices and Driver Circuits in Multilevel Inverter

The various configurations of multilevel inverter involve the use of more numbers of switching devices, energy storage devices and/or unidirectional devices. Each switching unit necessitates the add-on driver circuit for proper functionality. Cascaded H-Bridge Multilevel Inverter requires overlapped switching pulses for the switching devices in positive and negative arms of the bridge which may lead to short circuit during the device failure. This work addresses the problems in different configurations of multilevel inverter by using reduced number of switching and energy storage devices and driver circuits. In the present approach Single Switch is used for each stair case positive output and single H-Bridge for phase reversal. Driver circuits are reduced by using the property of body diode of the MOSFET. Switching pulses are generated by Arduino Development Board. The circuit is simulated using Matlab. More so, through experimental means, it is physically tested and results are analyzed for the 5-step inverter and thereby simulation is fully validated. Consequently, cycloconverter operation of the circuit is simulated using Matlab. Moreover, half bridge configuration of the multilevel inverter is also analyzed for high frequency induction heating applications.

A new variable-mode control strategy for LLC resonant converters operating in a wide input voltage range

This paper proposes a new variable-mode control strategy that is applicable for LLC resonant converters operating in a wide input voltage range. This control strategy incorporates advantages from full-bridge LLC resonant converters, half-bridge LLC resonant converters, variable-frequency control mode, and phase-shift control mode. Under this control strategy, different input voltages determine the different operating modes of the circuit. When the input voltage is very low, it works in a full-bridge circuit and variable frequency mode(FB_VF mode). When the input voltage rises to a certain level, it shifts to a full-bridge circuit and phase-shifting control mode(FB_PS mode). When the input voltage further increases, it shifts into a half-bridge circuit and variable frequency mode(HB_VF mode). Such shifts are enabled by the digital signal processor(DSP), which means that no auxiliary circuit is needed, just a modification of the software. From light load to heavy load, the primary MOSFET for the LLC resonant converter can realize zero-voltage switching(ZVS), and the secondary rectifier diode can realize zero-current switching(ZCS). With an LLC resonant converter prototype with a 300 W rated power and a 450 V output voltage, as well as a resonant converter with 20–120 V input voltage, the experiments verified the proposed control strategy. Experimental results showed that under this control strategy, the maximum converter efficiency reaches 95.7% and the range of the input voltage expands threefold.

A noise immunity improved level shift structure for a 600 V HVIC

A novel level shift circuit featuring with high dV/dt noise immunity and improved negative V_S capacity is proposed in this paper.Compared with the conventional structure,the proposed circuit adopting two cross-coupled PMOS transistors realizes the selective filtering ability by exploiting the path which filters out the noise introduced by the dV/dt.In addition,a differential noise cancellation circuit is proposed to enhance the noise immunity further.Meanwhile,the negative V_S capacity is improved by unifying the detected reference voltage and the logic block＇s threshold voltage.A high voltage half bridge gate drive IC adopting the presented structure is experimentally realized by using a usual 600 V BCD process and achieves the stable operation up to 65 V/ns of the dV/dt characteristics.